uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	Clock bugs, LED order.	Nick Foster	2010-07-29	2	-8/+12
\| \| \| \| \| \| \| \| \| \|	Figured out cold-start problem with Matt's help -- the DCM wasn't being reset. This also explains why USRP2 didn't like it when clocks_mimo_config was omitted -- it was sneakily resetting the DCM while enabling/disabling ref outputs. Also re-did USRP2P LED order and genericized the LED settings so LED_D is LED_D for both USRP2 and USRP2P.
*	Stripped out all the clock functionality except for init'ing the FPGA. Clock ↵	Nick Foster	2010-07-28	2	-260/+0
\| \| \| \|	smarts have been host-side for a while, so this is redundant code.
*	Ethernet blinky light changes. Link LED works. D201 (next to PHY) blinks on ↵	Nick Foster	2010-07-28	1	-1/+8
\| \| \| \|	TX. Yellow LED on connector blinks on TX/RX.
*	Ethernet mods for activity LED.	Nick Foster	2010-07-27	2	-2/+31
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*	Ethernet PHY re-do.	Nick Foster	2010-07-27	3	-1/+600
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*	New branch with firmware dir from USRP2P branch.	Nick Foster	2010-07-26	22	-0/+2682