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* Stripped out all the clock functionality except for init'ing the FPGA. Clock ↵Nick Foster2010-07-281-0/+1
| | | | smarts have been host-side for a while, so this is redundant code.
* Ethernet PHY re-do.Nick Foster2010-07-271-1/+0
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* New branch with firmware dir from USRP2P branch.Nick Foster2010-07-261-0/+48