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* firmware: b2xx: Update to newer Cypress FX3 SDKmichael-west2020-08-253-129/+113
| | | | | | | | | - Updated README with instructions on how to build using new SDK (1.3.4 as of this change) - Updated makefiles - Updated memory map patch Signed-off-by: michael-west <michael.west@ettus.com>
* B2xx: firmware: Fix address for serial numbermichael-west2020-08-251-1/+1
| | | | | | | | The address for the serial number was off by 2 bytes, causing a bad value in the USB descriptor. This only occurred if the bootloader image was loaded on the device. Signed-off-by: michael-west <michael.west@ettus.com>
* b200: add custom bootloaderMark Meserve2019-04-1121-630/+2039
| | | | | - Adds custom bootloader code - Refactor common functions in firmware and bootloader
* Definitions of MASK_GPIO_SHDN_SW and GPIO_AUX_PWR_ON Errorsfenggnef2018-08-011-2/+2
| | | | | MASK_GPIO_SHDN_SW ( GPIO[52] ) should be shifted by "GPIO_SHDN_SW" but "GPIO_FX3_SCLK ". Otherwise GPIOs of FX3 will initial GPIO_FX3_SCLK ( GPIO[53] ) as GPIO and SPI respectively. It will make GPIO[53] conflict between SPI and GPIO, and SHDN_SW will not work properly as a power switch.
* b200: fw: Change USB2 Buffer Size and Buffer CountMartin Braun2018-07-121-2/+2
| | | | | | Change FX3 firmware for USB2 so the eob flag is always seen, particularly on packets that are a multiple of 512 bytes in size.
* B200: FX3 performance optimizations based on Cypress AN86947michael-west2017-01-202-6/+6
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* Updated compat numbers for B2x0 and X3x0Martin Braun2015-07-141-1/+1
| | | | | - B2x0: FW compat number (goes with previous firmware update) - X3x0: Max HW rev number
* fx3: New firmware features: Logging, more configurationBalint Seeber2015-07-143-364/+756
| | | | | | | - Logging in conjunction with B200 side-channel utility (using UART or directly over USB) - More and better configurability, e.g. Tx voltage swing and DMA configuration
* FX3: Updating FW to support NI-USRP VID and PIDsBen Hilburn2015-04-153-3/+120
| | | | | Conflicts: firmware/fx3/b200/b200_usb_descriptors.c
* b200: Bumped FX3 firmware compat number to 7.Ashish Chaudhari2014-10-011-1/+1
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* b200: Removed all AD9361 related firmwareAshish Chaudhari2014-08-125-418/+3
| | | | | | | - FX3 does not respond to AD9361 firmware transaction VREQs - FX3 does not respond to AD9361 SPI transaction VREQs - Deleted all AD9361 firmware files - Bumped FW compat to 6
* b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-011-1/+1
| | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
* b2xx: Pulling FX3 and AD9361 source code into master.Ben Hilburn2014-04-0711-0/+4318