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| | * | | simplification of udp asio socket stuffJosh Blum2010-05-172-44/+43
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| | * | | calculate max samples per packet using otw typeJosh Blum2010-05-174-19/+37
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| * | | | burn sd card fix, units for seek and skip in blocks not bytesJosh Blum2010-05-181-2/+2
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| * | | added set freq with lo offset to simple usrp wrapperJosh Blum2010-05-142-0/+10
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| * | | card burner notesJosh Blum2010-05-141-2/+14
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| * | | memcpy data when in custom io typeJosh Blum2010-05-131-4/+10
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| * | | fix to ad9777 dac controlJosh Blum2010-05-132-3/+3
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| * | | card burner: added --list option, added warning, added sync on linuxJosh Blum2010-05-131-6/+19
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| * | | work on usrp2 card burner, uses blockdev and /proc/paritions to check for ↵Josh Blum2010-05-131-37/+83
| | | | | | | | | | | | | | | | devices, windows tweaks as well
| * | | notes on usrp2 card burnerJosh Blum2010-05-121-9/+8
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| * | | Added card burner python app with gui and windows support.Josh Blum2010-05-124-6/+295
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| * | | Moved usrp2 eeprom addr read/write to host control over i2c/eeprom interface ↵Josh Blum2010-05-118-89/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | calls. No longer part of the dude/bro protocol. Simplified the mac and ip addr read write code in mboard impl. Modified the mac addr type to take byte_vector_t from serial.hpp types.
| * | | Added a place for serdes control on the host.Josh Blum2010-05-1011-34/+120
| | | | | | | | | | | | | | | | | | | | Fix bug in codec control. Comment out some clock control in fw code.
| * | | Moved adc and dac control into codec control source file.Josh Blum2010-05-1010-56/+158
| | | | | | | | | | | | | | | | The codec control powers down the chips on destruction.
| * | | Merge branch 'shrinkfw' into usrp2Josh Blum2010-05-1016-533/+112
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| | * | | Moved some misc setting registers into host.Josh Blum2010-04-283-15/+28
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| | * | | removed some unused things like gpio from microblaze codeJosh Blum2010-04-287-312/+4
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| | * | | Added reload flag to the stream cmd.Josh Blum2010-04-2811-209/+83
| | | | | | | | | | | | | | | | | | | | | | | | | This reloads the last command to handle continuous streaming in hardware. Moved rx control register setup and stream command issuing to the host.
| * | | | added save state for ic regs map commonJosh Blum2010-05-101-6/+35
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| * | | | Merge branch 'udp' of git@ettus.sourcerepo.com:ettus/fpgaprivJosh Blum2010-05-106-32/+47
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| | * | | Merge branch 'corgan_fixes' into udp_corganMatt Ettus2010-04-266-32/+47
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| | | * | Update config to all eight clock buffers to be used.Johnathan Corgan2010-03-291-1/+1
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| | | * | Added timing constraint for Wishbone clock/dsp_clock skewJohnathan Corgan2010-03-291-0/+2
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| | | * | Merge commit 'upstream/master'Johnathan Corgan2010-03-092-1/+2
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| | | * | | Cut debug bus connection to etherenet MAC to make closing timing easierIan Buckley2010-02-241-2/+7
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| | | * | | Remove some warnings in dsp_core_rxJohnathan Corgan2010-02-231-3/+7
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| | | * | | Fix missing item on sensitivity listJohnathan Corgan2010-02-231-1/+1
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| | | * | | Change bit width of CORDIC constants to remove meaningless warningJohnathan Corgan2010-02-231-24/+24
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| | | * | | Manually assign clk_fpga to BUFG to improve timingJohnathan Corgan2010-02-231-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting Router Phase 1: 96908 unrouted; REAL time: 25 secs Phase 2: 85651 unrouted; REAL time: 35 secs Phase 3: 27099 unrouted; REAL time: 49 secs Phase 4: 27099 unrouted; (97405) REAL time: 49 secs Phase 5: 27259 unrouted; (5348) REAL time: 54 secs Phase 6: 27277 unrouted; (0) REAL time: 54 secs Phase 7: 0 unrouted; (0) REAL time: 1 mins 46 secs Phase 8: 0 unrouted; (0) REAL time: 1 mins 56 secs Phase 9: 0 unrouted; (0) REAL time: 2 mins 29 secs
* | | | | | Divide by 4 to convert byts/sec to samples/sec. Multiply by 4 is right out.Philip Balister2010-05-231-1/+1
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* | | | | | Work on crc testing program. Currently dumps first received packet to thePhilip Balister2010-05-211-10/+36
| | | | | | | | | | | | | | | | | | | | | | | | screen. Started to reduce teh number of warnings.
* | | | | | OK, now crc uses the timed interface to set the data rate.Philip Balister2010-05-211-21/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert "Revert "Revert "Update test program to reflect what is in the FPGA image.""" This reverts commit b5dfe74e991d240f0e666dfd521726ec61128eb8. Conflicts: host/apps/omap_debug/usrp-e-crc-rw.c
* | | | | | Rename loopback test program to match bin file name.Philip Balister2010-05-202-3/+3
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* | | | | | Enable realtime scheduling in loopback test to prevent overruns.Philip Balister2010-05-201-0/+5
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* | | | | | Display data rate in samples/second and fix typo.Philip Balister2010-05-191-5/+5
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* | | | | | Calculate received sample rate for loopback test.Philip Balister2010-05-191-3/+24
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* | | | | | Use better optimization settings.Philip Balister2010-05-191-5/+6
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* | | | | | Fix initialization bug.Philip Balister2010-05-191-0/+6
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* | | | | | Rename test program to match FPGA bin file name and add data rate calculation.Philip Balister2010-05-192-19/+39
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* | | | | | Keep repo in sync with my churn ...Philip Balister2010-05-192-7/+12
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* | | | | | Comment out progress indicators.Philip Balister2010-05-181-4/+8
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* | | | | | Revert "Revert "Update test program to reflect what is in the FPGA image.""Philip Balister2010-05-181-21/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 7d0a98fc33c17457c9f4cd8e03eddb0d559457f0. Must make filenames more different.
* | | | | | Remove rand for now. Fix bug in data rate calculation.Philip Balister2010-05-181-2/+4
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* | | | | | Revert "Update test program to reflect what is in the FPGA image."Philip Balister2010-05-181-20/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4d82cabe938b398bc42cab3d316983d2bbe40d06. Now sure where I got the idea this image did not contain the rate setting code.
* | | | | | Update test program to reflect what is in the FPGA image.Philip Balister2010-05-141-21/+20
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* | | | | | got clock gen config working and testedJosh Blum2010-05-131-4/+6
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* | | | | | Connect enable to the correct gpio.Philip Balister2010-05-131-1/+1
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* | | | | | Change to 24 bit transfers.Philip Balister2010-05-131-2/+2
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* | | | | | Print a . for every packet received.Philip Balister2010-05-132-0/+5
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* | | | | | Add calculation for data trasnfer rates.Philip Balister2010-05-121-3/+43
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