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| * | Updated master-specfic documentationNicholas Corgan2014-07-313-4/+12
| | | | | | | | | | | | | | | * Updated manual URL on OctoClock documentation after manual overhaul * Improved "Coding to the API" page
| * | Merge branch 'maint'Martin Braun2014-07-314-11/+35
| |\| | | | | | | | | | | | | Conflicts: host/utils/usrp_burn_mb_eeprom.cpp
| | * usrp_burn_mb_eeprom: write all changes to the EEPROM at onceNicholas Corgan2014-07-311-2/+3
| | | | | | | | | | | | * Utility was unnecessarily wearing out EEPROMs by calling separate writes for each key
| | * Merge branch 'maint' into uhd/bug492michael-west2014-07-3073-3189/+3354
| | |\ | | | | | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.cpp
| | | * tx fe corrections: fixing mixed tabs / spaces, other horrible whitespace cruftBen Hilburn2014-07-252-14/+11
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| | | * Merge 'maint' into x300/bug513Ben Hilburn2014-07-2563-3135/+3183
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| | | * | X300: Added UHD support for TX FEIan Buckley2014-07-182-1/+14
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| | * | | Fix for BUG #492: UHD: set_time_unknown_pps() fails with GPSDO installedmichael-west2014-06-253-3/+17
| | | | | | | | | | | | | | | | | | | | - Added polling for PPS time change after setting time from GPSDO.
| * | | | usrp_burn_mb_eeprom: write all changes to EEPROM at onceNicholas Corgan2014-07-281-2/+3
| | | | | | | | | | | | | | | | | | | | * Manually applied 1f848914a09795a37156968cc7a5dd11fcb869d3 to master due to merge conflict
* | | | | b200: Added variable rate SPI core for AD9361 and ADF4001Ashish Chaudhari2014-08-018-8/+159
| | | | | | | | | | | | | | | | | | | | | | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz
* | | | | b200: AD9361 firmware bugfixesAshish Chaudhari2014-08-011-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Fix for BUG #485: B200: Channels Swap Between Runs # Added code to transition state machine out of FDD while reconfiguring active chains. # bb:0b9929 Mon Jun 16 14:56:26 2014 -0700 - Fix for BUG #500: B210: RX channels are not phase aligned # Set bit to invert RX if internal LNA is bypassed # bb:0a4565 Thu Jun 5 17:10:37 2014 -0700
* | | | | b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-0123-158/+2894
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
* | | | Updated images infoNicholas Corgan2014-07-231-2/+2
| | | | | | | | | | | | | | | | * URL from commit a2f47725f5e6a182c3b30b10c2ce08778fd98123 is invalid
* | | | Merge branch 'maint'Nicholas Corgan2014-07-230-0/+0
|\ \ \ \ | | |_|/ | |/| | | | | | | | | | Conflicts: host/CMakeLists.txt
| * | | Updated images package info for UHD 3.7.2 rc1003_007_002_rc1Nicholas Corgan2014-07-231-1/+1
| | | | | | | | | | | | | | | | * MD5sum from commit 6ca920485a30034cc4673d382fd37ff7a719c3e4 is invalid
* | | | Updated images URL+MD5sum with new OctoClock firmware+bootloaderNicholas Corgan2014-07-231-2/+2
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* | | | OctoClock firmware upgrade, added host driverNicholas Corgan2014-07-23132-738/+14684
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * OctoClock can communicate with UHD over Ethernet * Can read NMEA strings from GPSDO and send to host * Added multi_usrp_clock class for clock devices * uhd::device can now filter to return only USRP devices or clock devices * New OctoClock bootloader can accept firmware download over Ethernet * Added octoclock_burn_eeprom,octoclock_firmware_burner utilities * Added test_clock_synch example to show clock API
* | | | Merge branch 'maint'Nicholas Corgan2014-07-232-3/+3
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| * | | Updated UHD version and images URL+MD5sum for 3.7.2 rc1Nicholas Corgan2014-07-232-3/+3
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* | | | Merge branch 'maint'Ben Hilburn2014-07-2258-3128/+3153
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| * | | fpga: Updating FPGA code for UHD-3.7.2-rc1Ben Hilburn2014-07-2258-3128/+3153
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* | | | Merge branch 'maint'Ben Hilburn2014-07-221-0/+2
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| * | | Updated CHANGELOG for UHD-3.7.2-rc1Ben Hilburn2014-07-221-0/+2
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* | | | Merge branch 'origin/maint'Ben Hilburn2014-07-222-3/+4
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| * | | Commented out warning if X300 reference clock fails to lock within 1 second ↵michael-west2014-07-221-2/+3
| | | | | | | | | | | | | | | | during initialization. Sometimes it takes longer and that is OK.
| * | | Fix for BUG #517: B200: Regression of power level on RXmichael-west2014-07-221-1/+1
| | | | | | | | | | | | | | | | - Fixed scalar for RX DSP core
* | | | added explanation of Boost thread warning messageNeel Pandeya2014-07-221-8/+13
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* | | | Merge branch 'maint'Ben Hilburn2014-07-221-1/+21
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| * | | uhd: updating CHANGELOG for uhd-3.7.2 releaseBen Hilburn2014-07-211-1/+21
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* | | Merge remote-tracking branch 'origin/maint'Ben Hilburn2014-07-174-29/+125
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| * | Merge branch 'origin/x300/bug469' into maintBen Hilburn2014-07-173-25/+121
| |\ \ | | | | | | | | | | | | Fixing empty GPS NMEA strings on X300
| | * | Updated copyright year.michael-west2014-07-171-1/+1
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| | * | Fix for BUG #469michael-west2014-07-171-0/+2
| | | | | | | | | | | | | | | | - Added mutex for write_uart()
| | * | - Changed variables from uint8_t to uint32_t so parsing of hex strings would ↵michael-west2014-07-171-3/+3
| | | | | | | | | | | | | | | | work properly.
| | * | Addressing comments from review.michael-west2014-07-173-24/+23
| | | | | | | | | | | | | | | | | | | | | | | | - Corrected types of some variables to be boost types. - Removed debugging code accidentally left in. - Changed some compiled out error messages to log messages.
| | * | Fix for BUG #469: Bad/Empty GPS NMEA strings returned when the queries are ↵michael-west2014-07-173-24/+119
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | made in a random wait iterative fashion Fix for BUG #460: X300: GPGGA sensor most often empty, while RMC is usually OK - Added checksum verification of NMEA strings - Improved handling of short or malformed strings - Fixed GPSDO data synchronization between X300 firmware and host
| * | Merge branch 'origin/b200/bug516' into maintBen Hilburn2014-07-171-4/+4
| |\ \ | | | | | | | | | | | | Fixing B200 clock rate float compare.
| | * | BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-07-101-1/+1
| | | | | | | | | | | | | | | | - Addressed feedback from review.
| | * | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
| | | | | | | | | | | | | | | | - Corrected clock rate checks for B2x0
| | * | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
| | |/ | | | | | | | | | - Corrected clock rate checks for B2x0
* | | Merge branch 'origin/martin/utils/init_only_probe'Ben Hilburn2014-07-171-1/+2
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| * | | utils: uhd_usrp_probe gets argument --init-onlyMartin Braun2014-07-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will run the tool without the output (unless --tree is provided). Using --init-only, uhd_usrp_probe can be used to simply test a device in more detail than doing a uhd_find_device, but the output of the device initalization is not scrolled by because of the device info output.
* | | | Merge remote-tracking branch 'origin/maint'Ben Hilburn2014-07-174-13/+24
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| * | Merge branch 'origin/ashish/rx_pcie_overflows' into maintBen Hilburn2014-07-172-3/+7
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| | * \ Merge branch 'maint' into ashish/rx_pcie_overflowsAshish Chaudhari2014-07-154-4/+4
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| | * | | x300: Bugfix for overflows on PCIe at 200MS/sAshish Chaudhari2014-06-272-3/+7
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| * | | Merge branch 'origin/b200/bug512' into maintBen Hilburn2014-07-171-9/+15
| |\ \ \ | | | | | | | | | | | | | | | B200 now creates internal PPS. Depends on FPGA change.
| | * | | Enhancement #512: B210: Need an Internal PPSmichael-west2014-06-131-9/+15
| | | | | | | | | | | | | | | | | | | | - Added support for internal PPS selection (set as default)
| * | | | Merge branch 'origin/n200/bug527' into maintBen Hilburn2014-07-171-1/+2
| |\ \ \ \ | | |_|_|/ | |/| | | | | | | | Fixing issue with 50 MSps resulting in two tones for N200.
| | * | | Fix for BUG #527: N200: 50 Msps results in two tonesmichael-west2014-07-011-1/+2
| |/ / / | | | | | | | | | | | | - Adjusted check to enable first half-band filter only if the rate is decimated enough between the CIC and other half-band filter
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