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| | * docs: tweak OSX build from source advice to have more obvious NOTEs, per uhd ↵Michael Dickens2015-07-061-5/+14
| | | | | | | | | | | | issue #37
* | | Merge branch 'master' into x300/rev7_supportAshish Chaudhari2015-07-0714-288/+47
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| * | Merge branch 'maint'Martin Braun2015-07-012-6/+7
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| | * b200: Codec loopback test now throws on failure.Martin Braun2015-07-011-5/+6
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| | * docs: Minor manual updateMartin Braun2015-06-301-1/+1
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| * | uhd: Removed the ORC dependencyMartin Braun2015-07-018-252/+6
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| * | ad9361: brought in Boost.Assign std::map workaround for MSVC 2013Nicholas Corgan2015-06-291-4/+11
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| * | Merge branch 'maint'Martin Braun2015-06-291-1/+1
| |\| | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.cpp
| | * b200: Modify initialization sequence to avoid warningsMartin Braun2015-06-292-12/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will set the actual default rate to an integer factor of whatever the tick rate is, but leave the property tree value at zero. This avoids warnings if the chosen tick rate is not a multiple of the previous default rate, but also returns a zero value for the rate when it has not been initialized, allowing the user to probe if the value has not yet been set.
| | * msvc: fixed default DLL resource templateNicholas Corgan2015-06-251-1/+1
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| * | b200: Modify initialization sequence to avoid warningsMartin Braun2015-06-293-25/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will set the actual default rate to an integer factor of whatever the tick rate is, but leave the property tree value at zero. This avoids warnings if the chosen tick rate is not a multiple of the previous default rate, but also returns a zero value for the rate when it has not been initialized, allowing the user to probe if the value has not yet been set.
| * | Merge branch 'maint'Martin Braun2015-06-238-31/+424
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| | * docs: Fixed FPGA manual auto-buildingMartin Braun2015-06-232-3/+2
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| | * doc: Integrated install instructions into manualMartin Braun2015-06-237-28/+422
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* | | x300: Added FPGA->ADC Clock delay for rev 7+ boardsAshish Chaudhari2015-07-071-1/+1
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* | | x300: Bumped FPGA compat number to 11Ashish Chaudhari2015-07-071-1/+1
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* | | x300: Added self-cal to tune ADC source-sync data delaysAshish Chaudhari2015-07-073-50/+160
| | | | | | | | | | | | | | | | | | | | | - Self-calibration routine steps through various values of IDELAY taps on the SS data bits to detect metastability in the capture interface and computes an ideal delay tap value - Self calibration is triggered at device creation
* | | x300: Added self-cal to tune ADC clk delay at startupAshish Chaudhari2015-07-013-33/+239
| | | | | | | | | | | | | | | | | | | | | | | | - Self-calibration routine steps through various values of LMK delay to detect metastability in the SSCLK -> radio_clk crossing and computes an ideal delay for the ADC clock. - Self calibration is triggered at startup if the self_cal_adc_delay device arg is specified
* | | x300: Added set/get_clock_delay to x300_clock_ctrlAshish Chaudhari2015-07-013-18/+245
| | | | | | | | | | | | | | | | | | | | | - This function allows delaying divider pairs using the digital and analog delay blocks in the LMK divider - ctrl object caches delay for later retrieval - Minor fixes to LMK regmap
* | | uhd: Added soft_register header-only util libraryAshish Chaudhari2015-06-291-0/+312
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* | | docs: Fixed FPGA manual auto-buildingMartin Braun2015-06-292-3/+2
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* | | doc: Integrated install instructions into manualMartin Braun2015-06-297-28/+422
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* | Merge branch 'maint'Martin Braun2015-06-232-3/+4
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| * docs: added missing parameter descriptionsNicholas Corgan2015-06-222-3/+4
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* | multi_usrp: doxygen fixesNicholas Corgan2015-06-221-4/+2
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* | cmake: allow for custom DLL resource fileNicholas Corgan2015-06-221-1/+17
| | | | | | | | | | * Use -DCUSTOM_RC_FILE=(filepath) option to use custom RC file * Defaults to host/lib/uhd.rc.in if none specified
* | Merge branch 'maint'Martin Braun2015-06-221-3/+4
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| * cmake: removed unnecessary printsNicholas Corgan2015-06-221-3/+4
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* | byte_vector: removed duplicate codeNicholas Corgan2015-06-181-13/+0
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* | Merge branch 'maint'Martin Braun2015-06-111-0/+1
|\| | | | | | | | | Conflicts: host/include/uhd/usrp/multi_usrp.hpp
| * multi_usrp: Add define for GPIO capabilitiesMartin Braun2015-06-111-0/+2
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* | Merge branch 'maint'Martin Braun2015-06-0912-24/+99
|\| | | | | | | | | | | | | Conflicts: host/lib/usrp/common/ad9361_ctrl.hpp host/lib/usrp/common/ad9361_driver/ad9361_device.h host/lib/usrp/e300/e300_remote_codec_ctrl.hpp
| * examples: Updated init_usrp example on note about CMake flagsMartin Braun2015-06-092-0/+9
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| * E300: Implement get_freq() for E300 network mode.michael-west2015-05-223-0/+18
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| * B200/E300: Fix incorrect readback of frequency.michael-west2015-05-226-3/+31
| | | | | | | | When the LO is tuned it changes the frequency on both channels. The frequency value read back for the first channel was not updated when the LO frequency for the other channel was tuned to a different value.
| * x300: Updated clock rate / ref freq warnings for clarityMartin Braun2015-05-221-16/+28
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| * ad9361: Minor clarifications on req_rate and baseband_bwMartin Braun2015-05-192-4/+13
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| * doc: e310: Update the manifest URL.Moritz Fischer2015-05-131-1/+1
| | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
| * fixup! e300: gps: If gps is detected, set device time to gps time on init.Moritz Fischer2015-05-121-0/+3
| | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
| * convert: Add sc16-sc16 SSE converterTom Tsou2015-05-112-0/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sc16-sc16 wire to host type converter is effectively an I/Q swap or 16-bit byteswap for little and big endian cases respectively. This implmentation is a subset of fc32 and fc64 converters without the floating point portion and scaling. The resulting byte ordering is as follows: ----------------- | A | B | C | D | Wire ----------------- 0 1 2 3 ----------------- | C | D | A | B | Litte-endian ----------------- 0 1 2 3 ----------------- | B | A | D | C | Big-endian ----------------- 0 1 2 3 Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* | doc: e310: Update the manifest URL.Moritz Fischer2015-05-141-1/+1
| | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* | fixup! e300: gps: If gps is detected, set device time to gps time on init.Moritz Fischer2015-05-141-0/+3
| | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* | convert: Add sc16-sc16 SSE converterTom Tsou2015-05-142-0/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sc16-sc16 wire to host type converter is effectively an I/Q swap or 16-bit byteswap for little and big endian cases respectively. This implmentation is a subset of fc32 and fc64 converters without the floating point portion and scaling. The resulting byte ordering is as follows: ----------------- | A | B | C | D | Wire ----------------- 0 1 2 3 ----------------- | C | D | A | B | Litte-endian ----------------- 0 1 2 3 ----------------- | B | A | D | C | Big-endian ----------------- 0 1 2 3 Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* | b200: Added another rate check for auto tick rate modeMartin Braun2015-05-111-0/+8
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* | b200: Removed stray messagesMartin Braun2015-05-111-2/+0
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* | Merge branch 'maint'Martin Braun2015-05-112-2/+9
|\| | | | | | | | | | | | | Conflicts: fpga-src host/CMakeLists.txt host/cmake/Modules/UHDVersion.cmake
| * Renamed images package for release tagMartin Braun2015-05-111-2/+2
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| * Updated fpga-src submoduleMartin Braun2015-05-111-0/+0
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| * 3.8.4 Release CandidateMartin Braun2015-05-063-3/+11
| | | | | | | | | | | | - Updated fpga-src - Updated version strings - Updated images package
| * b200: Changed the max byte rate over USB2Marcus Müller2015-05-061-2/+1
| | | | | | | | | | Max rate is now set to 53248000, allowing for more than 8MS/s, which is closer to the actual value that USB2 can handle.
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