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* usrp-e100: Check in wip for timed image test program.Philip Balister2011-02-141-14/+37
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* uhd: misc speedups w/ look up tablesJosh Blum2011-02-102-8/+14
| | | | | | | use a look up table for io type size (in the case its used in the fast-path) move the static const pred table in vrt unpacker to the global level, for some reason this was incurring a malloc (perhaps because there were 2 tables).
* uhd: set BOOST_SP_USE_QUICK_ALLOCATOR for managed buffer overhead, hope this ↵Josh Blum2011-02-101-0/+4
| | | | doesnt cause trouble later
* uhd: reference vector fix revealed when building w/ debugJosh Blum2011-02-101-15/+7
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* udp: udp_zero_copy_asio comments and tweaksJosh Blum2011-02-101-10/+2
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* uhd: simplified converter calls in vrt pkt handler with ref vector changesJosh Blum2011-02-101-9/+4
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* uhd: use ref vector class for the conversion routines I/OJosh Blum2011-02-104-16/+16
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* uhd: tweaks to bounded bufferJosh Blum2011-02-104-11/+35
| | | | | | | Added push with haste. Call with haste first in the wait methods to avoid time compare/wait when not needed. Added new calls to the libusb and udp zero copy impls tests pass
* uhd: increment api compat number for changes in next branchJosh Blum2011-02-101-1/+1
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* Merge branch 'usrp_e100_devel' into nextJosh Blum2011-02-1031-543/+913
|\ | | | | | | | | Conflicts: host/lib/usrp/usrp_e100/io_impl.cpp
| * Fix typo in usage message.Philip Balister2011-02-081-1/+1
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| * Merge branch 'fpga_next' into usrp_e100_develJosh Blum2011-02-082-29/+57
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| | * separate clear for tx and rx, and add a global reset from the hostMatt Ettus2011-02-021-10/+19
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| | * usrp-e100: added missing newfifo files to list, added missing signals for timedJosh Blum2011-01-262-1/+7
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| | * usrp-e100: added 32bit test read/write register, fixes to get buildingJosh Blum2011-01-251-7/+17
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| | * reorganized u1e register space to make room for 64 settingregsMatt Ettus2011-01-251-12/+15
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| * | usrp-e100: notes on unbricking/clock reoveryJosh Blum2011-02-081-0/+14
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| * | usrp-e100: tweak for clock control register calculation, works betterJosh Blum2011-01-271-30/+33
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| * | usrp-e100: reverted clockgen config + tweaks, its workingJosh Blum2011-01-272-110/+105
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| * | usrp-e100: added passthrough to images makefile, tweaks to usrp-e-utilityJosh Blum2011-02-033-10/+29
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| * | usrp-e100: changes for global reset and non-zero sids on rxJosh Blum2011-01-224-10/+33
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| * | usrp-e100: combined clkconfig and fpga downloader into usrp-e-utility, ↵Josh Blum2011-01-317-321/+126
| | | | | | | | | | | | simplified code
| * | usrp-e100: work on clock controlJosh Blum2011-01-302-53/+106
| | | | | | | | | | | | | | | | | | | | | added vco calibration routine and readback to check for calibrated changed the counters/dividers calculation to be event driven and more mathematically calculated.
| * | usrp-e100: tweaks to clock control and setting from apiJosh Blum2011-01-302-5/+15
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| * | usrp-e100: added app notes for fpga loading and reclockingJosh Blum2011-02-013-1/+55
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| * | Fixes for timed fpga interface test program. Still need to solve the CRCPhilip Balister2011-02-011-1/+3
| | | | | | | | | | | | calculation failures.
| * | Merge branch 'usrp_e100_devel' of ettus.sourcerepo.com:ettus/uhdpriv into ↵Philip Balister2011-02-0134-1276/+528
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | usrp_e100_devel Conflicts: host/lib/usrp/usrp_e100/clock_ctrl.cpp
| | * \ Merge branch 'multi_usrp_only' into usrp_e100_develJosh Blum2011-01-3133-1231/+395
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| | * | | usrp-e100: clock control use boost math gcd for divider calculationJosh Blum2011-01-291-4/+7
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| | * | | usrp-e100: working clock control 61.44, 52mhzJosh Blum2011-01-291-8/+10
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| | * | | usrp-e100: so far internal vco code works w/ 64mhzJosh Blum2011-01-291-62/+133
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| * | | | usrp-e100: remove unused clock control constants, enb test clockJosh Blum2011-01-311-16/+1
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| * | | usrp-e100: work on clock controlJosh Blum2011-01-302-22/+108
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| * | | Merge branch 'usrp_e100_devel' of ettus.sourcerepo.com:ettus/uhdpriv into ↵Philip Balister2011-01-262-96/+106
| |\ \ \ | | | | | | | | | | | | | | | usrp_e100_devel
| | * \ \ Merge branch 'clkgen_config' of ettus.sourcerepo.com:ettus/uhdpriv into ↵Nick Foster2011-01-252-96/+106
| | |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usrp_e100_devel Conflicts: host/utils/CMakeLists.txt
| | | * | | E100: rewrote clkgen-config so it's less incredibly opaqueNick Foster2011-01-242-96/+106
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| * | | | | Local changes for wishbone tests, PLease review carefully.Philip Balister2011-01-261-2/+6
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| * | | | | Start converting the timed test program to work with mmap interface.Philip Balister2011-01-261-8/+17
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| * | | | | Update header from in e100 test programs from main uhd.Philip Balister2011-01-261-5/+6
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| * | | | | Mark received block as accepted by user space.Philip Balister2011-01-261-0/+2
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| * | | | | Update timed crc test program to use mmap's interface. Needs testing.Philip Balister2011-01-251-53/+77
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| * | | | usrp-e100: created component for stand-alone usrp-e utils and added wb test utilJosh Blum2011-01-2310-15/+164
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| * | | | usrp-e100: added misc test register 32 bitsJosh Blum2011-01-251-0/+3
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| * | | | usrp-e100: changes to regs map for re-mapping of address spaceJosh Blum2011-01-231-40/+43
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* | | | | udp: comments and minor code tweaks for udp zero copy implJosh Blum2011-02-101-18/+41
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* | | | | Merge branch 'master' into nextJosh Blum2011-02-092-7/+23
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: host/lib/transport/udp_zero_copy_asio.cpp
| * | | | | uhd: potential fix for macos asio recv issue (just disable it)Josh Blum2011-02-081-0/+6
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| * | | | | usrp2: fix for lingering packet problemJosh Blum2011-02-081-0/+8
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| * | | | | usrp2: fix for icmp echo reply checksum (data was not included in checksum)Josh Blum2011-02-061-7/+15
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* | | | | | uhd: tweaks to vrt pkt handler and usrp2 fc monitorJosh Blum2011-02-092-16/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pkt handler, only resize once per call to send/recv (not per fragment) fc monitor, code tweaks, check ready before touching time wait stuff (faster)
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