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* Merge branch 'maint'Martin Braun2014-09-258-55/+177
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| * x300: Reverted back to no analog delay for DAC ref clocksmichael-west2014-09-251-5/+0
| * x300: added reset and resync of ADCs and DACs when changing reference clockmichael-west2014-09-256-54/+166
| * B200: added support for reading the exact product name from EEPROM for B200 a...Neel Pandeya2014-09-251-0/+15
* | uhd: Added an example for CMake usageMartin Braun2014-09-253-0/+126
* | cmake: set ENV variables to tell GR's FindUHD.cmake that these files were act...Michael Dickens2014-09-252-0/+13
* | cmake: Add in UHDConfig*.cmake files and install them into CMAKE_MODULES_DIR ...Michael Dickens2014-09-253-0/+269
* | Merge branch 'maint'Martin Braun2014-09-250-0/+0
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| * Updated images URL for 3.7.3RC1003_007_003_rc1Martin Braun2014-09-251-3/+2
| * Updated ChangeLog for 3.7.3Martin Braun2014-09-241-0/+9
* | Merge branch 'maint'Martin Braun2014-09-24278-292798/+13471
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| * | Updated ChangeLog for 3.7.2Martin Braun2014-09-241-0/+9
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| * docs: Changed Xilinx ISE version from 14.4 to 14.7Ashish Chaudhari2014-09-242-25/+25
| * fpga: Multiple X300 FPGA bugfixes and enhancementsAshish Chaudhari2014-09-24275-292796/+13460
* | Merge branch 'maint'Martin Braun2014-09-245-44/+55
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| * x300: Added output sync for DAC reference clocksMartin Braun2014-09-241-0/+1
| * uhd: Fixed logging bug (#476) -- UHD logging has unexplained effect on packet...michael-west2014-09-243-43/+53
| * sbx: Fixed logging string (showed TX instead of RX)Martin Braun2014-09-241-1/+1
* | Merge branch 'maint'Martin Braun2014-09-239-12/+37
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| * uhd: Added an operator/ for (fs_path, size_t)Martin Braun2014-09-233-0/+28
| * chdr-dissector: fix wireshark-1.12 detectionJaroslav Škarvada2014-09-231-1/+1
| * uhd_dump: use LIBS instead of LDFLAGSJaroslav Škarvada2014-09-231-2/+2
| * usrp: don't print duplicate GPSDO detection messagesNicholas Corgan2014-09-233-6/+1
| * cbx: Fixed LO FRAC truncationMartin Braun2014-09-231-4/+6
* | b200: Set sensible defaults for freq, gain and rate at startupMartin Braun2014-09-022-5/+19
* | ad9361: Made recommended rate a constantMartin Braun2014-09-023-3/+4
* | Give user the option to ignore daughterboard's calibration file at runtimeNicholas Corgan2014-09-029-11/+50
* | Updated ABI version stringMartin Braun2014-09-021-1/+1
* | Added missing pure virtual destructors to base classesNicholas Corgan2014-09-0185-81/+392
* | Merge branch 'maint'Martin Braun2014-09-011-1/+1
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| * x300_dboard_iface: added UHD_UNUSED() macro to unused parameters in set_clock...Nicholas Corgan2014-08-291-1/+1
* | Merge branch 'maint'Martin Braun2014-08-270-0/+0
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| * uhd: Added a stop stream cmd to the rx exampleMartin Braun2014-08-271-0/+3
* | uhd: Added a stop stream cmd to the rx exampleMartin Braun2014-08-251-0/+3
* | uhd: Changed line endings from Windows -> UNIXAshish Chaudhari2014-08-213-2119/+2119
* | ad9361: Output PLL lock status on ctrl output pins.Ashish Chaudhari2014-08-211-1/+1
* | uhd: Updated images URL and MD5Martin Braun2014-08-211-3/+2
* | Merge branch 'maint'Martin Braun2014-08-211-2/+2
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| * fixup! uhd: updated images url for UHD 3.7.2 releaserelease_003_007_002Ashish Chaudhari2014-08-201-1/+1
| * uhd: updated images url for UHD 3.7.2 releaseAshish Chaudhari2014-08-201-2/+2
* | b100: More RX buffersMartin Braun2014-08-211-1/+2
* | OctoClock: bugfixes/improvementsNicholas Corgan2014-08-2016-188/+236
* | fpga: Added FPGA code for B200 AD9361 host driver additionAshish Chaudhari2014-08-202-8/+19
* | Merge branch 'master' into ashish/cat_refactor_phase2Ashish Chaudhari2014-08-2020-132/+95
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| * | Merge branch 'maint'Ashish Chaudhari2014-08-196-50/+25
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| | * fpga: Added FPGA code for X300 MIMO alignment bugfixAshish Chaudhari2014-08-195-50/+22
| | * Updated CHANGELOG for 3.7.2rc2Martin Braun2014-08-181-0/+3
| * | Merge branch 'maint'Martin Braun2014-08-186-57/+43
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| | * Bumping FPGA compat to 7.michael-west2014-08-181-1/+1
| | * Changed analog delay on DAC reference and radio clocks from 1075ps to 900psmichael-west2014-08-181-4/+4
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