uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
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\| * \| \|	usrp: work on meeting timing constraints	Josh Blum	2012-04-10	5	-25/+30
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	* fifo ctrl register the vita ticks and use late * vita de/framer make nchans const since we dont change it * simplify readback muxes to minimal usage
* \| \| \|	dboard: updated timed sync stuff for wbx* sbx*	Josh Blum	2012-04-20	5	-39/+53
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* \| \| \|	usrp2: cleanup for fifo control wraparound_lt16 routine	Josh Blum	2012-04-20	1	-5/+3
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* \| \| \|	usrp2: add variable for wb/spi interface	Josh Blum	2012-04-20	2	-12/+27
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This variable gets set based on the rev type so we can support the command fifo when present.
* \| \| \|	usrp2: updated fifo command with to 16 (1 short fifo)	Josh Blum	2012-04-18	1	-1/+1
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* \| \| \|	usrp: updated nchan usage for vita rx change	Josh Blum	2012-04-10	1	-1/+1
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* \| \| \|	Merge branch 'master' into next	Josh Blum	2012-04-10	5	-282/+337
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\| * \| \|	uhd: updated transport hammer	Nicholas Corgan	2012-04-10	1	-269/+261
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\| * \| \|	Merge branch 'fpga_master'	Josh Blum	2012-04-10	1	-0/+60
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\| * \ \ \	Merge branch 'maint'	Josh Blum	2012-04-09	7	-12/+10
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\| \| * \| \|	Merge branch 'fpga_maint' into maint	Josh Blum	2012-04-09	5	-6/+6
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\| \| * \| \| \|	dsp: clear register now overlaps with numchan register.	Josh Blum	2012-04-09	1	-4/+2
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This fixes the bug of unwanted clearing when setting format.
\| \| * \| \| \|	usrp: fix set_clock_config typo for external and mimo clock ref	Josh Blum	2012-04-06	1	-2/+2
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This is a typo in the set_clock_config implementation. However, the enum values are the same, so this would not cause a bug. Fixed although set_clock_config is a deprecated interface.
\| * \| \| \| \|	uhd: changed ABI compat string to 3.4.0-1 for new multi usrp additions	Josh Blum	2012-04-05	1	-1/+1
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\| * \| \| \| \|	multi_usrp: added subdev spec and antenna to get_usrp_info functions	Nicholas Corgan	2012-04-05	1	-1/+1
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\| * \| \| \| \|	multi_usrp: added subdev spec and antenna to get_usrp_info functions	Nicholas Corgan	2012-04-05	1	-1/+5
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\| * \| \| \| \|	lib: corrected multi_usrp docs	Nicholas Corgan	2012-04-04	1	-2/+0
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\| * \| \| \| \|	lib: multi_usrp can now output motherboard and daughterboard data in a ↵	Nicholas Corgan	2012-04-04	2	-6/+69
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	dictionary form
* \| \| \| \| \|	Merge branch 'fpga_next' into next	Josh Blum	2012-04-10	4	-3/+63
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\| * \| \| \| \|	Merge branch 'master' into next	Josh Blum	2012-04-09	5	-7/+67
\| \|\ \ \ \ \ \| \| \| \|_\|_\|/ \| \| \|/\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Conflicts: usrp2/top/N2x0/u2plus_core.v usrp2/top/USRP2/u2_core.v
\| \| * \| \| \|	Merge branch 'maint'	Josh Blum	2012-04-09	5	-6/+6
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\| \| \| * \| \|	vita: moved clear register to overlap with nchan register	Josh Blum	2012-04-09	5	-6/+6
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This fixes the bug where setting the format clears the vita RX. This is only an issue when the noclear option is set by UHD, because the format register is always so, so it always clears. Note: noclear is there to support the backwards compat API (pre streamer). Now, numchans and clear overlap. This is ok because in the host code, clear and numchans are always used together. All timing meets on N2xx and USRP2.
\| \| * \| \| \|	Merge branch 'maint'	Josh Blum	2012-04-02	2	-5/+5
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\| \| * \| \| \|	fpga: extract usage summary from map file	Josh Blum	2012-03-27	1	-0/+60
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\| * \| \| \| \|	Merge branch 'master' into next	Josh Blum	2012-03-26	4	-85/+92
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* \| \| \| \| \|	Merge branch 'master' into next	Josh Blum	2012-04-03	28	-357/+722
\|\ \ \ \ \ \ \| \| \|_\|_\|/ / \| \|/\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Conflicts: host/examples/CMakeLists.txt
\| * \| \| \| \|	Merge branch 'maint'	Josh Blum	2012-04-03	3	-8/+8
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\| \| * \| \| \|	Merge branch 'fpga_maint' into maint	Josh Blum	2012-04-02	2	-5/+5
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\| \| \| * \| \|	b100: fix slave fifo data xfer exit condition	Josh Blum	2012-04-01	2	-5/+5
\| \| \| \| \|/ \| \| \| \|/\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	When exiting the read/write data state, when the transfer count maxes out/peaks, the fifo read/write signals were getting this condition the cycle after with the state change.
\| \| * \| \|	examples: fix bsd compilation for network relay example	Josh Blum	2012-04-01	1	-3/+3
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Fixes compilation on platforms that dont have one of the OS defines by providing #else case for rx_dsp_buff_size constant. This also makes OSX the special case and assumes other OS can handle the large RX socket buffer size.
\| * \| \| \|	Merge branch 'docs_stuff'	Josh Blum	2012-03-30	16	-343/+349
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\| \| * \| \| \|	docs: All instances of "the UHD" have been changed to "UHD". All paths, ↵	Nicholas Corgan	2012-03-30	13	-146/+145
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	filenames, variables, etc. have been uniformly emphasized.
\| \| * \| \| \|	docs: Format consistency, such as representation of program names or filepaths	Nicholas Corgan	2012-03-29	12	-131/+136
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\| \| * \| \| \|	docs: Adding links to specific installation instructions for Windows and ↵	Nicholas Corgan	2012-03-29	7	-81/+83
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Linux, as well as general formatting consistency/clean-up
\| * \| \| \| \|	uhd: windows fixes and formatting for hammer example	Josh Blum	2012-03-30	1	-293/+293
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\| * \| \| \| \|	Merge branch 'maint'	Josh Blum	2012-03-29	7	-5/+15
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\| \| * \| \| \|	usrp1: stop threads in deconstructor	Josh Blum	2012-03-29	3	-4/+10
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Its important to stop the threads before we let the other smart point objects naturally deconstruct to avoid thread-based race conditions. The attempt to deconstruct the tree and soft time ctrl had a bug because the tree had references in subtrees within the dboard manager class. Rather than continue to fix this method and deconstruct the tree to free up soft time ctrl, it seems simpler to just stop the thread in soft time ctrl, and then let it naturally deconstruct later by ref count.
\| \| * \| \| \|	cmake: Binaries give notification before installing or uninstalling UHD. ↵	Nicholas Corgan	2012-03-29	4	-1/+5
\| \| \|/ / / \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Better to give an output than just an empty pause.
\| * \| \| \|	examples: Transport Hammer - a stress test that calls for random or ↵	Nicholas Corgan	2012-03-27	2	-0/+349
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	user-specified amounts of TX or RX samples with little to no delay between calls
* \| \| \| \|	Merge branch 'master' into next	Josh Blum	2012-03-26	8	-126/+169
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\| * \| \| \|	Merge branch 'maint'	Josh Blum	2012-03-26	2	-4/+25
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\| \| * \| \|	dbsrx: limit the USRP1 + DBSRX GPIO clock rate to 4MHz	Josh Blum	2012-03-26	1	-1/+8
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This fixes the lockup/clocking condition when the following hw combo is used: USRP1 r4.5 + DBSRX + another i2c board
\| \| * \| \|	usrp2: possible fix for invalid broadcast replies	Josh Blum	2012-03-26	1	-3/+17
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\| * \| \| \|	Merge branch 'maint'	Josh Blum	2012-03-26	4	-85/+92
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\| \| * \| \|	Merge branch 'fpga_maint' into maint	Josh Blum	2012-03-26	4	-85/+92
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\| \| \| * \|	B100: port cleanups from b100-txbug to this branch	Nick Foster	2012-03-26	2	-28/+21
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\| \| \| * \|	fpga: fifo_2clock handles widths and sizes in-between corgens	Josh Blum	2012-03-25	1	-21/+23
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\| \| \| * \|	b100: cleanup redundant logic for slwr and slrd	Josh Blum	2012-03-25	1	-2/+2
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\| \| \| * \|	b100: extra data pktend cycle for fifo addr	Josh Blum	2012-03-25	1	-2/+8
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\| \| \| * \|	b100: slave fifo fix for dst/src ready signals	Josh Blum	2012-03-24	2	-35/+41
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Some of the changes my be overkill, but the idea is to be more careful about allowing FIFO IO to occur on transitions. The cal app was able to complete successfully.