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* uhd: Remove includes of list_of.hpp where appropriateMartin Braun2021-06-2413-14/+0
| | | | This Boost header is included in some places, despite not being used.
* uhd: Remove all occurences of boost::math::*round()Martin Braun2021-06-2435-111/+111
| | | | | | | Its behaviour is almost identical to std::lround, which we use instead. The only downside of std::lround is that it always returns a long, which we don't always need. We thus add some casts for those cases to make the compiler happy.
* b200: flush receive buffer after getting an overflowMatthew Crymble2021-06-241-1/+3
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* b200: temporary change to remove stream restart after overflowMatthew Crymble2021-06-241-3/+8
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* ci: move builds to the NI Build FarmMichael Auchter2021-06-242-289/+73
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* ci: Add trace builds to pipelineSteven Koo2021-06-243-2/+23
| | | | Signed-off-by: Steven Koo <steven.koo@ni.com>
* cal: ensure proper range handlingLars Amsel2021-06-231-5/+9
| | | | | | | | | | | * frequency range adapts the lower limit to align with the step size the lower limit will be set to step size if it s smaller than the step size and not explicitly set. This prevents uneven measurment spots * aranges upper limit is always increased by step size to ensure the upper limit is part of the range * rearranged gain range calculation, create the range once and reverse it for RX
* cal: Remove silent capture of TypeErrorLars Amsel2021-06-231-6/+4
| | | | | | | Remove the silent capture of TypeError because it would also catch TypeErrors is initilization errors in class creation. Instead check obj to be a class first to ensure issubclass wont throw a TypeError.
* cal: Add X410 internal antenna names to invalid antenna listLars Amsel2021-06-231-1/+1
| | | | Added CAL_LOOPBACK and TERMINATION to invalid antenna list
* cal: add more error number for ADC overloadLars Amsel2021-06-231-1/+5
| | | | also added short comment which erro originates from which driver
* cal: make 'calibrate all channels' default for --channels argumentLars Amsel2021-06-231-1/+1
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* cal: Add support for X410Martin Braun2021-06-231-0/+11
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* uhd: Use chain's block channel to get power ref keysGrant Meyerhoff2021-06-231-2/+2
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* mpm: Move cal freeze defaults to x4xxLane Kolbly2021-06-232-3/+27
| | | | | | | | This fixes an issue where the slot 0 ADC blocks would erroneously report that they were unfrozen. Additionally, adds logic to restore a saved cal freeze state on sync source change.
* docs: usrp_x4xx: add network leds behavior to docsHumberto Jimenez2021-06-231-8/+41
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* docs: devices: remove child page relation to individual dboardsHumberto Jimenez2021-06-231-2/+2
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* docs: zbx: link docs to rf specificationsHumberto Jimenez2021-06-231-4/+23
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* fixup! zbx: Fix clang compiler warningsMartin Braun2021-06-231-4/+0
| | | | | The TRACE message is repeated in the zbx_lo_ctrl object and is thus not worth carrying the _chan and _trx attributes.
* lib: deps: Upgrade vendor version of Pybind11 to 2.6.1Martin Braun2021-06-2326-751/+1743
| | | | | | | | | | | | | | | | | | | | | | - Copied include/pybind11 directory over from source repo - Also re-ran remove_comments.py as before This fixes this warning on newer Python libraries: .../internals.h: 200:9: warning: 'PyEval_InitThreads' is deprecated [-Wdeprecated-declarations] PyEval_InitThreads(); ^ /usr/include/python3.9/ceval.h:130:1: note: 'PyEval_InitThreads' has been explicitly marked deprecated here Py_DEPRECATED(3.9) PyAPI_FUNC(void) PyEval_InitThreads(void); ^ /usr/include/python3.9/pyport.h:508:54: note: expanded from macro 'Py_DEPRECATED' #define Py_DEPRECATED(VERSION_UNUSED) __attribute__((__deprecated__)) It also obviates the need for patches to Pybind11 to silence clang warnings.
* fpga: x400: Fix x4xx_qsfp_wrapper testbenchWade Fife2021-06-221-0/+3
| | | | | Reorder dependencies so that sc_util_v1_0_vl_rfs.sv gets compiled first when using ModelSim.
* transport: Fix compiler warning in nirio_linkMartin Braun2021-06-221-2/+0
| | | | | | Remove unused variables. These variables were doubly problematic: They referenced the boost:: namespace, but this file had no more boost includes.
* lmx2572: Fix compiler warningMartin Braun2021-06-221-3/+2
| | | | Unused private field _mux_state.
* debug_dboard: Fix compiler warningMartin Braun2021-06-221-1/+1
| | | | Superfluous 'this' capture.
* zbx: Fix clang compiler warningsMartin Braun2021-06-227-46/+21
| | | | | | | | - Missing override - Superfluous 'this' lambda capture - Register state in zbx_cpld_ctrl was being initialized too late (this is actually a bug depending on compiler version) - Remove lots of unused fields from experts
* zbx: Fix compilation on clang-10Martin Braun2021-06-223-8/+5
| | | | | | The ostream<< overloads where in the wrong namespace to be found by the expert framework. Other compilers are more forgiving; not so clang 10. This enables compilation on that compiler.
* docs: zbx: address review observations in docsHumberto Jimenez2021-06-221-2/+2
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* docs: usrp_x4xx: address review observations in docsHumberto Jimenez2021-06-223-70/+157
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* mpm: restore rfdc nco frequency after setting sync sourceGrant Meyerhoff2021-06-222-0/+31
| | | | After setting sync sources, the RFDCs get reset, we need to restore the previously set frequencies so that the device continues to transmit/receive at the requested frequency
* x3xx: Improve image loaderMartin Braun2021-06-221-27/+44
| | | | | | | - When specifying a file path, no longer infer the FPGA type for the logging from the image that is currently loaded. - Use sanitize product names for ni-2974 everywhere were appropriate - Remove some usages of boost::format that weren't doing anything useful
* usrp2: Use explicit template type for std::min<T>StefanBruens2021-06-221-1/+1
| | | | Signed-off-by: Aaron Rossetto <aaron.rossetto@ni.com>
* usrp2: Replace boost::math::iround/math::sign with std::lroundStefanBruens2021-06-221-5/+5
| | | | | | | | | Instead of multiplying zone with the sign repeatedly just make the zone a signed value. See #437, #438 Signed-off-by: Aaron Rossetto <aaron.rossetto@ni.com>
* docs: Fix typosf380cedric2021-06-221-3/+3
| | | | Signed-off-by: Aaron Rossetto <aaron.rossetto@ni.com>
* docs: Fix python3-ruamel.yaml name on RPM based OSf380cedric2021-06-221-2/+2
| | | | | | The package is named python3-ruamel-yaml on RHEL & derivatives. Signed-off-by: Aaron Rossetto <aaron.rossetto@ni.com>
* usrp2: Apply minor cleanups to Boost usage in usrp2Martin Braun2021-06-181-9/+8
| | | | | | | - Inconsistent usage of asio:: or boost::asio:: (now uses the latter consistently) - Removed some usage of boost::format() where it really didn't add any value
* docs: zbx: update cpld source code locationHumberto Jimenez2021-06-181-1/+1
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* docs: usrp_x4xx: apply minor corrections in docsHumberto Jimenez2021-06-181-41/+40
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* uhd: Add missing channel parameter when reading power ref keysLars Amsel2021-06-181-2/+2
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* mpm: tests: Add lib/ to library load pathAaron Rossetto2021-06-181-1/+8
| | | | | Ensure that DYLD_LIBRARY_PATH on OS X or LD_LIBRARY_PATH on Linux platforms is set appropriately before invoking MPM's Python unit tests.
* test: add DPDK option for max streaming rate testsMatthew Crymble2021-06-183-82/+230
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* uhd: Add callback for setting sync_sourcesGrant Meyerhoff2021-06-174-0/+53
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* usrp2: Fix Boost headersMartin Braun2021-06-171-2/+2
| | | | | | | | | On Boost 1.76, this would otherwise fail with an error: [...] .../usrp2_impl.cpp:920:37: error: ‘boost::math’ has not been declared 920 | const int sign = boost::math::sign(new_freq); [...]
* fpga: sim: Check for empty packet in clear_unused_bytesWade Fife2021-06-171-0/+4
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* x400: sim: Move testbenches to sim folderWade Fife2021-06-1713-0/+0
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* fpga: Update testbenches to work in ModelSimWade Fife2021-06-1711-136/+303
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* fpga: x400: Add makefiles for RF testbenchesWade Fife2021-06-177-3/+212
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* fpga: tools: Detect assertions in ModelSim simulationWade Fife2021-06-171-2/+22
| | | | | | | This change allows assertion errors/failures in ModelSim to be detected and causes ModelSim to return a non-zero value when such an assertion error occurs. This allows the return value of ModelSim to be used to determine whether or not the testbench passed.
* fpga: tools: Put SIM_SRCS at end of compile orderWade Fife2021-06-171-1/+1
| | | | | | VHDL depends on the compile order. This commit changes the order so that SIM_SRCS are compiled last with ModelSim to avoid issues with dependencies.
* fpga: tools: Support new FPGA types in viv_simulator.makWade Fife2021-06-171-2/+2
| | | | | | This updates the existing PART_NAME generation used in simulation makefiles to work with newer part families by calling viv_gen_part_id.py to generate the part name needed by Vivado.
* fpga: tools: Fix python2 reference in viv_ip_builder.makWade Fife2021-06-171-1/+1
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* fpga: tools: Add modelsim.excludesWade Fife2021-06-171-0/+18
| | | | | This is a list of testbenches that don't work with ModelSim and should be excluded when running run_testbenches.py.
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