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* fpga: tools: Add Quartus build utilitiesHumberto Jimenez2021-12-013-0/+163
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* tests: add automated streaming testsMatthew Crymble2021-11-308-0/+528
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* tests: add streaming setup script for performance enhancementsMatthew Crymble2021-11-301-0/+288
| | | | | | | | | This script is intended to be run before streaming. - Manages network interfaces, memory buffers, and other aspects of the system configuration to give the host machine ideal performance during streaming. - Installs/updates dpdk/util dependencies for the script - Generates and writes uhd config files for dpdk
* rfnoc: radio: Fix async message handling channel checksMartin Braun2021-11-301-8/+8
| | | | | | | | | | | | | | | | | | | | | The async message handler and the async message validator would erroneously compare channel numbers for RX async messages with the number of valid TX channels. On TwinRX, where there are zero TX channels, this would always fail. Elsewhere in the code, the comparisons for TX and RX channels mixed up input and output ports. The second issue is that the comparison made was a "greater than" rather than "greater or equal". The effect of these two bugs was that potentially, we could have accepted async messages for an invalid port N, where N is the number of valid ports of this block, and that for TwinRX/X300 users, async messages on channel 1 would not get accepted (they would, however, get accepted for channel 0 because of the second issue). This includes overrun handling, which was broken for channel 1 and 3 on an X300. Another effect of the bug was that EPIDs for async messages weren't always programmed correctly.
* multi_usrp_rfnoc: Reduce latency of get_time_now()michael-west2021-11-172-10/+10
| | | | | | | Getting the time from the mb_controller is slow, so try to get the time from the Radio on the fast path first. Signed-off-by: michael-west <michael.west@ettus.com>
* host: Add ability to get time from Radio blockmichael-west2021-11-173-1/+43
| | | | | | Add API calls to Radio control to get ticks and time. Signed-off-by: michael-west <michael.west@ettus.com>
* fpga: Add ability to get time from Radio blockmichael-west2021-11-173-2/+26
| | | | | | Added registers to read back radio time. Bumped minor compat. Signed-off-by: michael-west <michael.west@ettus.com>
* tests: Remove skip_dram from streaming performance test scriptMartin Braun2021-11-161-2/+2
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* docs: Several minor manual improvementsMartin Braun2021-11-166-10/+49
| | | | | | | - Remove documentation of skip_dram, skip_ddc, skip_duc, which are all obsolete since UHD 4 - Properly document serialize_init - Add a table of valid args for X310 as with other devices
* examples: Use cmul for gain block in-tree IP exampleWade Fife2021-11-151-21/+18
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* rfnoc: mgmt_portal: Fix order of validity checksMartin Braun2021-11-151-2/+6
| | | | | | | | | | | The order must: - Check transaction has the right number of hops, then read hop - Check hop has the right number of operations (at least 2), then read those ops - Check the ops have the correct opcodes The code was doing checks in the wrong order. Thanks to Github user johnwstanford for pointing this out.
* rfnoc: Add CHDR width to make argsMartin Braun2021-11-126-1/+15
| | | | | | | This provides every block controller with a copy of its CHDR width. Note: mock blocks always get configured with a 64-bit CHDR width, to retain API compatibility.
* rfnoc: Make chdr_w_to_bits() C++11-compatibleMartin Braun2021-11-121-0/+15
| | | | | | | This allows consumers of UHD compiling with C++11 to include this file (which is now included via noc_block_base) by turning a switch statement into a functionally equivalent (albeit less readable) nested ternary statement.
* tests: Fix rfnoc_graph mock nodes stop-stream commandMartin Braun2021-11-121-1/+1
| | | | Thanks to Github user johnwstanford for pointing this out.
* tools: Fix rfnoc dissector buildMartin Braun2021-11-111-3/+3
| | | | | | The recent removal of cruft in 78336d4 caused an implicit include to be missing from this dissector, causing it to no longer compile. The include is added to the dissector explicitly now.
* B200: Re-sync timesmichael-west2021-11-102-10/+31
| | | | | | | | | | The times on the device can glitch if either the tick rate changes or the number of active chains changes. This throws off the time if the user gets streamers, changes the sample rate, or changes the tick rate after synchronizing the time. This change re-synchronizes the times automatically in those cases. Signed-off-by: michael-west <michael.west@ettus.com>
* python: multi_usrp: Add set_rx_spp()Wade Fife2021-11-091-0/+1
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* doc: x4xx: Document configuring eth0 static IPLane Kolbly2021-11-091-1/+28
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* mpmd: Increase UHD-side MTU cap for 10 GbE and 1 GbEMartin Braun2021-11-082-8/+18
| | | | | | | | | This gets closer to what our hardware can actually support. See the comments for further explanations. This has the side-effect of patching an issue on X410 (using 200 MHz images) where garbage samples would get injected (one per packet). It is not, however, the final fix for that problem.
* docs: x410: Document GPIO API and capabilitiesLane Kolbly2021-11-054-0/+251
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* docs: Collect all RFNoC block controllers in a module in the manualMartin Braun2021-11-0519-2/+51
| | | | | | This lets Doxygen create a page in the UHD manual that lists all RFNoC block controllers. It will be accessible under Manual -> Modules -> RFNoC -> RFNoC Blocks shipped with UHD.
* rfnoc: blocks: Minor cleanup (whitespace, typos)Martin Braun2021-11-056-13/+5
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* host: python: Add gpio_voltage python APILane Kolbly2021-11-051-1/+11
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* host: Add gpio_voltage discoverable featureLane Kolbly2021-11-054-0/+147
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* host: Add RPC calls for GPIO voltageLane Kolbly2021-11-052-1/+30
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* mpm: x4xx: Allow retrieving external power stateLane Kolbly2021-11-052-5/+51
| | | | | | | | | | | The external power can, broadly speaking, be in one of three possible states: - OFF (the default) - ON (the user has enabled external power, and it's working normally) - FAULT (the external power has encountered a fault condition) This commit allows the client of MPM to distinguish between these three conditions.
* examples: Test all variants in gain testbenchWade Fife2021-11-043-15/+61
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* examples: Make IQ order clear in gain RFNoC blockWade Fife2021-11-041-16/+25
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* host: python: Return mb_controller with reference_internalLane Kolbly2021-11-041-1/+1
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* mpm: x4xx: Allow GPIO0 and GPIO1 as port namesLane Kolbly2021-11-041-3/+5
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* fpga: rfnoc: Add RFNoC CHDR resize moduleWade Fife2021-11-047-0/+2031
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* fpga: rfnoc: Add CHDR management util functionsWade Fife2021-11-041-4/+85
| | | | Add missing chdr_mgmt_*() and enum_to_chdr_w() functions.
* fixup! mpm: x4xx: add DIO GPIO API configuration methodsLane Kolbly2021-11-031-0/+22
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* mpm: x4xx: add DIO GPIO API configuration methodsDhiren Wijesinghe2021-11-033-39/+227
| | | | | | These methods allow for reconfiguration of GPIO masters for x4xx. The method names are get_gpio_banks, get_gpio_srcs, get_gpio_src, and set_gpio_src.
* fixup! host: x4xx: Implement GPIO APILane Kolbly2021-11-031-2/+14
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* example: gpio: Separate bank and port argumentsLane Kolbly2021-11-031-10/+18
| | | | | | | "bank" refers to what the radio control sees, and "port" refers to what the user looking at the physical device sees. For example, on X410 each radio control only has a single (24-bit) output, which can be routed to either of two ports.
* host: x4xx: Implement GPIO APILane Kolbly2021-11-036-0/+257
| | | | | | | | | | | | This implements the GPIO API for X410 through get_gpio_attr and set_gpio_attr. In ATR mode, which channel's ATR state is chosen by the set_gpio_src call, setting e.g. DB0_RF0 for channel 0 or DB0_RF1 for channel 1. In manual mode, all 24 bits (for both ports) are set in a single register write. Although the front panel of the device has two ports, labelled GPIO0 and GPIO1, this API exposes them as though they were a single 24-bit GPIO port.
* host: Add GPIO functions to MPM RPC shimLane Kolbly2021-11-032-0/+20
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* rfnoc: Remove cruft from UHD 3 (constants)Martin Braun2021-11-024-101/+6
| | | | | | | | | | | | | This removes some constants from UHD that were left over from RFNoC/UHD 3.x. They are unused. rfnoc_rx_to_file had a commented-out section that was also UHD-3 only. Note that rfnoc/constants.hpp is pretty bare now, and could be removed. However, it is in the public header section, so we shall leave the used constants where they are. This requires fixing includes in mgmt_portal.cpp.
* docs: Align dependencies and bump deb package versionsMartin Anderseck2021-11-022-4/+7
| | | | | | Aligning dependencies between KB entries and documentation for Ubuntu 20.04 and bumping version numbers in the installation documentation to latest available versions in Ubuntu and PPA.
* x410: correct 100GbE link speedAndrew Lynch2021-11-022-2/+2
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* uhd: update num_recv_frames calculation for ctrl linksAndrew Lynch2021-11-021-1/+4
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* fpga: lib: Clean up axi_muxWade Fife2021-10-281-91/+160
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* fpga: rfnoc: Add labels to axi_switch generate blocksWade Fife2021-10-281-36/+67
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* fpga: rfnoc: Add labels to chdr_mgmt_pkt_handlerWade Fife2021-10-281-30/+45
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* fpga: rfnoc: Add documentation to chdr_xb_routing_tableWade Fife2021-10-281-46/+84
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* fpga: Shorten line length for Launchpad linterAaron Rossetto2021-10-281-2/+4
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* debs: Update upload_debs scriptAaron Rossetto2021-10-281-2/+2
| | | | | | This commit updates the releases for which we want to upload UHD support, as well as the way the version number is parsed from the Debian changelog file.
* host: gpio: Create gpio_atr_offsets to store GPIO registersLane Kolbly2021-10-277-94/+136
| | | | | | | Refactors register addresses into a gpio_atr_offsets structure which contains the various register addresses. This allows creating other devices with different GPIO register layouts with greater ease, and eliminates the use of macros (yay!)
* siggen: Fix direction of rotationWade Fife2021-10-275-44/+53
| | | | | | | | | The I and Q were swapped in sine_tone, which caused confusion and made the rotation of REG_CARTESIAN clockwise by default. This effectively made the resulting frequency negative. This PR makes the I and Q order consistent with RFNoC and fixes the direction of rotation so that a positive value for REG_PHASE_INC (phase increment) results in a counter-clockwise rotation, which yields a positive frequency.
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-05 00:59:33 +0000