Commit message (Collapse) | Author | Age | Files | Lines | |
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* | b100/e100: clock source option for pps phase sync abuse | Josh Blum | 2012-07-19 | 3 | -1/+27 |
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* | b100: firmware updates for next branch compatability | Josh Blum | 2012-07-19 | 3 | -29/+33 |
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* | Merge branch 'fpga_next' into next | Josh Blum | 2012-07-19 | 1 | -1/+8 |
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| * | u1plus: added sr misc hook for clock sync | Josh Blum | 2012-07-18 | 1 | -1/+8 |
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* | | docs: added comparative features list at top of each | Josh Blum | 2012-07-17 | 6 | -9/+65 |
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* | | e100: remove the test utils, NA anymore | Josh Blum | 2012-07-17 | 5 | -474/+0 |
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* | | images: updated images Makefile for E1x0 rename | Josh Blum | 2012-07-17 | 1 | -2/+2 |
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* | | Merge branch 'fpga_next' into next | Josh Blum | 2012-07-17 | 13 | -724/+219 |
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| * | e100: renamed top level for E100/E110 to E1x0 | Josh Blum | 2012-07-17 | 6 | -16/+16 |
| | | | | | | | | Some minor tweaks to gpmc_to_fifo + timing | ||||
| * | E100: squash E100/E110 top level work | Josh Blum | 2012-07-16 | 6 | -531/+84 |
| | | | | | | | | | | | | Implements timed commands and FIFO control. Uses control and data FIFOs for GPMC. Uses the common core for E100/B100. | ||||
| * | gpmc: squashed GPMC FIFO work for E100 | Josh Blum | 2012-07-16 | 5 | -162/+93 |
| | | | | | | | | | | The control and data slaves are now both implemented as FIFOs. Requires another squash of E100 top level to use. | ||||
| * | gpmc: tighter timing constraints and easier to route gpmc to fifo | Josh Blum | 2012-07-16 | 2 | -26/+37 |
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| * | Merge branch 'master' into next | Josh Blum | 2012-07-16 | 3 | -43/+6 |
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* | | | e100: ctrl impl changes for header offset | Josh Blum | 2012-07-16 | 1 | -2/+2 |
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* | | | e100: cleanup and make better use of IRQ gpio for control response | Josh Blum | 2012-07-16 | 1 | -50/+45 |
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* | | | e100: squashed host code for fifo control/timed commands | Josh Blum | 2012-07-16 | 8 | -364/+272 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This uses the new b100/e100 common core and FIFO control modules. Subsequent commit will be the compatible FPGA merge. Conflicts: host/lib/usrp/e100/io_impl.cpp | ||||
* | | | Merge branch 'master' into next | Josh Blum | 2012-07-16 | 8 | -49/+21 |
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| * \ \ | Merge branch 'maint' | Josh Blum | 2012-07-16 | 1 | -1/+4 |
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| | * | | | e100: set vita header offset for previous FPGA changeset | Josh Blum | 2012-07-16 | 1 | -1/+4 |
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| | * | | | Merge branch 'fpga_maint' into maint | Josh Blum | 2012-07-16 | 3 | -43/+6 |
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| * | \ \ \ | Merge branch 'fpga_master' | Josh Blum | 2012-07-16 | 3 | -43/+6 |
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| | * | | | | Merge branch 'maint' | Josh Blum | 2012-07-16 | 3 | -43/+6 |
| | |\ \ \ \ | | | | |/ / | | | |/| | | | | | | | | | | | | | | Conflicts: usrp2/top/E1x0/u1e_core.v | ||||
| | | * | | | e100: offset gpmc to fifo writes by 2 transfers | Josh Blum | 2012-07-15 | 2 | -5/+5 |
| | | | | | | | | | | | | | | | | | | | | | | | | This effectivly works around bus initial transaction issues. | ||||
| | | * | | | e100: reverted commit registering in gpmc | Josh Blum | 2012-07-15 | 1 | -38/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | There is a subtle bus issue that the last changset did not address. | ||||
| * | | | | | Merge branch 'maint' | Josh Blum | 2012-07-12 | 1 | -1/+1 |
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| | * | | | | n2xx: fix for usrp_n2xx_net_burner addr decode failure | Josh Blum | 2012-07-12 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the windows network address extractor: The except: continue line could get use stuck in an infinite loop. This fix sets addr to None so the code below it does not execute, and the next node in the chain is tested as expected. | ||||
| * | | | | | usrp: cache writes to gpio pins (avoids overhead) | Josh Blum | 2012-07-06 | 1 | -1/+7 |
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| * | | | | | Merge branch 'maint' | Josh Blum | 2012-07-06 | 1 | -1/+1 |
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| | * | | | | uhd: docstring typo fix version.hpp | Josh Blum | 2012-07-04 | 1 | -1/+1 |
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| * | | | | | lib: FW/FPGA compatibility error prompts user to use regular card/net burner ↵ | Nicholas Corgan | 2012-07-06 | 1 | -2/+2 |
| | | | | | | | | | | | | | | | | | | | | | | | | instead of gui | ||||
| * | | | | | Merge branch 'fpga_master' | Josh Blum | 2012-07-02 | 13 | -393/+4134 |
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* | | | | | | uhd: update image fetcher for next branch | Josh Blum | 2012-07-10 | 1 | -1/+1 |
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* | | | | | | uhd: make range_t a lightweight object | Josh Blum | 2012-07-04 | 3 | -19/+9 |
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* | | | | | | Merge branch 'fpga_next' into next | Josh Blum | 2012-07-02 | 23 | -1214/+4958 |
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| * | | | | | B100: squash B100 top level work | Josh Blum | 2012-07-02 | 4 | -406/+348 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implements timed commands and FIFO control. Uses control and data FIFOs for GPIF. Implements a common core for E100/B100. | ||||
| * | | | | | gpif: squashed GPIF slave fifo work for B100 | Josh Blum | 2012-07-02 | 4 | -414/+319 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The control and data enpoints are now both implemented as FIFOs. Requires another squash of B100 top level to use. | ||||
| * | | | | | fifo: added module packet_padder36 to fifo/ | Josh Blum | 2012-07-02 | 2 | -1/+157 |
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| * | | | | b100: removed unused proto files | Josh Blum | 2012-06-13 | 3 | -390/+0 |
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| * | | | | fpga: added setting regs based simple_i2c_core | Josh Blum | 2012-05-30 | 2 | -0/+117 |
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| * | | | | fpga: added some parameterization to settings_fifo_ctrl | Josh Blum | 2012-05-30 | 1 | -3/+6 |
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| * | | | | fpga: added various models from ISE | Josh Blum | 2012-05-30 | 7 | -0/+4011 |
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* | | | | | b100: squashed host code for fifo control/timed commands | Josh Blum | 2012-07-02 | 6 | -215/+99 |
| | | | | | | | | | | | | | | | | | | | | | | | | | This uses the new b100/e100 common core and FIFO control modules. Subsequent commit will be the compatible FPGA merge. | ||||
* | | | | | usrp: added fifo_ctrl_excelsior for FIFO control + async msgs | Josh Blum | 2012-07-02 | 3 | -1/+358 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fifo_ctrl_excelsior is the host code for dealing with E100/B100 control messages and async messages. It also has the SPI implementation. Timed commands are implemented on top of this code. | ||||
* | | | | | transport: multi-threaded send_packet_handler | Josh Blum | 2012-07-02 | 1 | -25/+77 |
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* | | | | | transport: multi-threaded recv_packet_handler | Josh Blum | 2012-07-02 | 1 | -22/+71 |
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* | | | | | transport: switch to the atomic claimer | Josh Blum | 2012-07-02 | 3 | -66/+3 |
| | | | | | | | | | | | | | | | | | | | | | | | | | This wont have much effect because the buffers are not currently used in any queue by the caller | ||||
* | | | | | uhd: added header with misc atomic wrappers | Josh Blum | 2012-07-02 | 2 | -1/+145 |
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* | | | | Merge branch 'maint' | Josh Blum | 2012-07-02 | 1 | -0/+3 |
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| * | | | cmake: got rid of remaining references of UHD_RELEASE_MODE being treated as ↵ | Nicholas Corgan | 2012-07-02 | 1 | -0/+3 |
| | | | | | | | | | | | | | | | | a boolean | ||||
* | | | | utils: added .in extension to images downloader source | Josh Blum | 2012-07-01 | 2 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | There seems to be confusion that this file can be used w/o building. The images downloader has been renamed to prevent execution b4 configure. |