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* usrp2: replaced spi and i2c async stuff with sync (since were out of the ↵Josh Blum2010-12-116-94/+22
| | | | fast-path)
* usrp2: removed buffer pool macros and constants from memory mapJosh Blum2010-12-112-216/+0
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* usrp2: implemented packet ctrl to read and write slow path packets from the ↵Josh Blum2010-12-115-96/+119
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* usrp2: pretty much gutted the buffer pool stuff with other misc changes, not ↵Josh Blum2010-12-1117-1245/+38
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* usrp2: provided way to disable flow control updates by setting to zeroJosh Blum2010-12-112-11/+14
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* Merge branch 'fpga_ise12'Josh Blum2010-12-093-4/+18
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| * Merge branch 'time_compare_speedup' into ise12Matt Ettus2010-12-091-2/+16
| |\ | | | | | | | | | | | | * time_compare_speedup: should safely delay the late signal which was causing timing problems
| | * should safely delay the late signal which was causing timing problemsMatt Ettus2010-12-061-2/+16
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| * | u2plus: clock lock pin capitalization failNick Foster2010-12-062-2/+2
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* | usrp2: polished the multi-device addressing scheme and updated docsJosh Blum2010-12-094-273/+331
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* | usrp-n: simplify ctrl response error so it cant throw, also increase timeout ↵Josh Blum2010-12-081-2/+4
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* | uhd: only install usrp2 apps when the component is enabledJosh Blum2010-12-041-6/+9
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* | uhd: only enable C when we are building the USRP-E100 utilty appsJosh Blum2010-12-042-1/+2
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* | uhd: added template macro to ddl import as well (macos)Josh Blum2010-12-031-1/+1
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* | uhd: tweaking the explicit instantiation stuff, just aestheticJosh Blum2010-12-013-10/+11
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* | uhd: tweak configuring usb messagesJosh Blum2010-11-301-6/+5
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* | uhd: set the HAVE_USB_SUPPORT FALSE when not found (fixes error)Josh Blum2010-11-301-0/+1
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* | uhd: added macro to enable/disable componentsJosh Blum2010-11-299-45/+54
| | | | | | | | | | | | libuhd prints summary of components added newline prints before config checks
* | Merge branch 'dboard_iface_gpio'Josh Blum2010-11-298-35/+172
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| * | uhd: added read-back calls to dboard iface gpio settings, and optional maskJosh Blum2010-11-268-35/+172
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* | | usrp-n: some rx path fixesJosh Blum2010-11-292-8/+3
| | | | | | | | | | | | | | | | | | removed stop streaming command from init (taken care of by reset) fixed incoming packet filter to pass inline message packets
* | | usrp2: added docs page for usrp2 that points to nxxx pageJosh Blum2010-11-292-0/+6
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* | usrp2: cover both rev3 cases for usrp2 revision numbersJosh Blum2010-11-241-2/+6
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* | usrp: replace struct member sizeof with this macro so it compiles on macJosh Blum2010-11-231-2/+5
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* | Merge branch 'refclock_docs'Josh Blum2010-11-232-5/+35
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| * | Updated refclock docs for USRP1, USRP2 and N2XXJason Abele2010-11-232-5/+35
| | | | | | | | | | | | | | | Added power range limits Added external refclock notes for USRP1
| * | Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdprivJosh Blum2010-11-221-3/+4
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* | \ \ Merge branch 'fpga_flow_control' into nextJosh Blum2010-11-231-1/+1
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| * | | packets are shorter now, so we need to tell the udp state machine that...Matt Ettus2010-11-231-1/+1
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* | | | E100: internal ref fix switch statementNick Foster2010-11-231-3/+3
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* | | | usrp-e100: updated for building with nextJosh Blum2010-11-232-7/+5
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* | | | Merge branch 'next' of ettus.sourcerepo.com:ettus/uhdpriv into nextJosh Blum2010-11-23273-1379/+30459
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| * | | | uhd: added new hardware to readmeJosh Blum2010-11-233-3/+8
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| * | | | usrp-n2xx: modified fw build name in makefileJosh Blum2010-11-231-3/+3
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| * | | | usrp-n210: added fpga build entry to images makefileJosh Blum2010-11-231-1/+17
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| * | | | Merge branch 'fpga_next' into nextJosh Blum2010-11-2365-878/+7961
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: fpga/usrp2/top/u1e_passthru/.gitignore fpga/usrp2/top/u1e_passthru/Makefile fpga/usrp2/top/u2plus/.gitignore fpga/usrp2/top/u2plus/Makefile usrp2/top/u1e_passthru/.gitignore usrp2/top/u1e_passthru/Makefile
| | * | | | Merge branch 'fpga_ise12' into fpga_nextJosh Blum2010-11-230-0/+0
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| | | * | | no need for second sequence number anymore. Each dsp tx chainMatt Ettus2010-11-212-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | generates its own flow control packets now.
| | | * | | shouldn't be executableMatt Ettus2010-11-201-0/+0
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| | | * | | modernize the testbenchMatt Ettus2010-11-191-18/+30
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| | | * | | get rid of extraneous U messages when we actually had an ACKMatt Ettus2010-11-182-7/+10
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| | | * | | fix problem with consecutive timed packets on txMatt Ettus2010-11-181-2/+0
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| | | * | | simplify time comparison to speed up logic and meet fpga timingMatt Ettus2010-11-132-4/+27
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| | | * | | we're still on version 12.1Matt Ettus2010-11-132-2/+2
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| | | * | | Add flow control and other small vrt fixes to u2p, minor cleanupsMatt Ettus2010-11-112-34/+38
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| | | * | | reset properlyMatt Ettus2010-11-111-0/+1
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| | | * | | compiles with new file locationsMatt Ettus2010-11-111-1/+1
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| | | * | | handle zero-length packets properlyMatt Ettus2010-11-113-55/+76
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| | | * | | clear out the vita tx chain and the tx fifo. need to check the fifoMatt Ettus2010-11-115-24/+25
| | | | | | | | | | | | | | | | | | | | | | | | reset to make sure it is in the correct clock domain.
| | | * | | added ability to truly clear out the entire rx chain. also removed old ↵Matt Ettus2010-11-113-29/+27
| | | | | | | | | | | | | | | | | | | | | | | | style fifo in rx.
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