Commit message (Collapse) | Author | Age | Files | Lines | |
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* | uhd: updated sync docs for timed commands | Josh Blum | 2012-03-23 | 1 | -1/+34 |
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* | Merge branch 'fpga_next' into next | Josh Blum | 2012-03-23 | 12 | -426/+1454 |
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| * | spi core: ready logic low one cycle earlier | Josh Blum | 2012-03-16 | 1 | -1/+1 |
| | | | | | | | | | | | | | | FIFO ctrl can poke registers every other cycle, the extra time to register not ready for spi core was too long. And it with ~trigger to get the not-ready one cycle earlier, so FIFO ctrl can block on the 2nd potential spi transaction. | ||||
| * | fifo ctrl: parameterize having a proto header | Josh Blum | 2012-03-16 | 4 | -10/+12 |
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| * | fifo ctrl: rename fifo ctrl module and add sid ack param | Josh Blum | 2012-03-16 | 4 | -37/+40 |
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| * | fifo ctrl: minor fixes for spi core, swap time define | Josh Blum | 2012-03-16 | 5 | -10/+10 |
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| * | fifo ctrl: simplified perfs, added spi clock idle phase | Josh Blum | 2012-03-16 | 5 | -333/+341 |
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| * | fifo ctrl: minor fixes from last commit | Josh Blum | 2012-03-16 | 3 | -366/+366 |
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| * | fifo ctrl: spi core work, fifo ctrl perifs, usrp2 support | Josh Blum | 2012-03-16 | 5 | -370/+429 |
| | | | | | | | | | | | | | | | | Continued work on simple spi core. Added peripherals input to fifo ctrl so perifs can backpressure fifo ctrl. Copied the implementation into usrp2 core. | ||||
| * | spi: created simple spi core (sr based) | Josh Blum | 2012-03-16 | 4 | -383/+593 |
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| * | fifo ctrl: simplified result packets (no tsf or sid) | Josh Blum | 2012-03-16 | 1 | -16/+7 |
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| * | fifo_ctrl: switched to medfifo and separate result fifo | Josh Blum | 2012-03-16 | 3 | -92/+122 |
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| * | fifo_ctrl: clear settings reg, and flow control | Josh Blum | 2012-03-16 | 3 | -10/+17 |
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| * | fifo ctrl: added time compare for timed commands | Josh Blum | 2012-03-16 | 1 | -3/+7 |
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| * | srb: created command queue, in and out state machines | Josh Blum | 2012-03-16 | 3 | -99/+162 |
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| * | usrp2: added vrt pack/unpacker to fifo ctrl | Josh Blum | 2012-03-16 | 1 | -40/+107 |
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| * | usrp2: first pass implementation of fifo control | Josh Blum | 2012-03-16 | 6 | -10/+594 |
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* | | Merge branch 'master' into next | Josh Blum | 2012-03-23 | 1 | -3/+4 |
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| * \ | Merge branch 'maint' | Josh Blum | 2012-03-23 | 1 | -3/+4 |
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| | * | | usrp: fix for rx_frontend_core_200 dc offset | Josh Blum | 2012-03-23 | 1 | -3/+4 |
| | | | | | | | | | | | | | | | | | | | | Mask off upper bits when setting a constant offset (I and Q regs). The sign bits (if negative) can flow off into the flags field. | ||||
* | | | | sbx: various fixes and tweaks for locking | Josh Blum | 2012-03-23 | 1 | -4/+3 |
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* | | | | sbx: mods for PLL sync reset | Josh Blum | 2012-03-23 | 1 | -3/+6 |
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* | | | | sbx: no readback during tuning, cache lock detect status when read | Josh Blum | 2012-03-23 | 4 | -12/+26 |
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* | | | | fifo ctrl: code reorganization and integer wrap-around arithmetic | Josh Blum | 2012-03-23 | 1 | -65/+90 |
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* | | | | fifo ctrl: implement timed command feature detection | Josh Blum | 2012-03-23 | 2 | -2/+12 |
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* | | | | uhd: added setup sleep to tx waveforms | Josh Blum | 2012-03-23 | 1 | -1/+4 |
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* | | | | fifo ctrl: use regular iface for U2_REG_MISC_CTRL_CLOCK | Josh Blum | 2012-03-23 | 2 | -6/+136 |
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* | | | | fifo ctrl: various tweaks | Josh Blum | 2012-03-23 | 4 | -12/+14 |
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* | | | | fifo ctrl: ~usrp2_fifo_ctrl acks, usrp2 DCM workaround, bootloader no blinkie | Josh Blum | 2012-03-23 | 3 | -1/+14 |
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* | | | | fifo ctrl: spi core work and host implementation | Josh Blum | 2012-03-23 | 9 | -38/+99 |
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* | | | | spi: work on fw support for simple spi core | Josh Blum | 2012-03-23 | 11 | -139/+74 |
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* | | | | usrp2: permanent timeout increase for timed commands | Josh Blum | 2012-03-23 | 1 | -2/+6 |
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* | | | | usrp2: implementation of timed commands working | Josh Blum | 2012-03-23 | 4 | -7/+49 |
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* | | | | usrp2: integrated fifo ctrl into usrp2 modules, implemented window'd acking | Josh Blum | 2012-03-23 | 4 | -65/+76 |
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* | | | | usrp2: added vrt pack/unpacker to fifo ctrl | Josh Blum | 2012-03-23 | 1 | -33/+46 |
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* | | | | usrp2: host and fw implementation for fifo control | Josh Blum | 2012-03-23 | 7 | -3/+178 |
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* / / | usrp2: work on alternative stream destination | Josh Blum | 2012-03-23 | 11 | -130/+287 |
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* | | usrp: fix typo for user setting reg | Josh Blum | 2012-03-21 | 1 | -1/+1 |
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* | | docs: whitespace fixing usrp2 docsrelease_003_004_000 | Josh Blum | 2012-03-21 | 1 | -2/+3 |
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* | | uhd: add calls to query an ABI compat string | Josh Blum | 2012-03-21 | 2 | -2/+20 |
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* | | usrp2: fw unlocks when ICMP dest unreachable | Josh Blum | 2012-03-21 | 1 | -1/+4 |
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* | | Added alternative Docutils install method to UHD docs | Nicholas Corgan | 2012-03-19 | 1 | -0/+4 |
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* | | Disabling the SBX mixer and baseband amp causes grief | Jason Abele | 2012-03-16 | 1 | -1/+1 |
| | | | | | | | | | | Some ADA4927 / AD5380 combinations do not appreciate being disabled, so lets not disable them | ||||
* | | tx_bursts: set EOB on nsamps <= spb | Nick Foster | 2012-03-16 | 1 | -1/+1 |
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* | | docs: Just added a couple of clarifying notes to the N2Xx docs. | Ben Hilburn | 2012-03-16 | 1 | -0/+27 |
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* | | B100: enable_gpif(0) disables FIFO output clock on FX2. this prevents the ↵ | Nick Foster | 2012-03-16 | 2 | -4/+4 |
| | | | | | | | | "stuffing zeroes" problem and improves transport reliability. | ||||
* | | usrp: fix from "rev iq correction" | Josh Blum | 2012-03-16 | 3 | -6/+6 |
| | | | | | | | | Must zero out the default IQ correction to have zero effect by default. | ||||
* | | n2x0: adjustment for phase delay over mimo cable | Josh Blum | 2012-03-14 | 1 | -1/+1 |
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* | | uhd: make atlbase options for msvc build | Josh Blum | 2012-03-14 | 2 | -4/+16 |
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* | | uhd: rev iq correction numbers format | Josh Blum | 2012-03-14 | 6 | -52/+15 |
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