| Commit message (Expand) | Author | Age | Files | Lines |
* | Merge branch 'maint' | Josh Blum | 2012-05-22 | 1 | -1/+38 |
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| * | Added registers for gpmc-to-fifo interface to address sequence errors for E10... | Al Fayez | 2012-05-22 | 1 | -1/+38 |
* | | Merge branch 'maint' | Josh Blum | 2012-05-10 | 2 | -7/+9 |
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| * | e100: bump compat minor for xclock reader fix | Josh Blum | 2012-05-10 | 1 | -1/+1 |
| * | fpga: xclock fix for edge case condition | Josh Blum | 2012-05-08 | 1 | -6/+8 |
* | | e100/b100: bumped compat number for timed commands merge | Josh Blum | 2012-04-25 | 2 | -2/+2 |
* | | slave_fifo: use 2KB FIFO size instead of 1KB | Nick Foster | 2012-04-24 | 1 | -1/+1 |
* | | b100: implement packet-end/flush cycle timeout | Josh Blum | 2012-04-24 | 3 | -12/+26 |
* | | gpif: removed unused gpif related files | Josh Blum | 2012-04-24 | 8 | -908/+1 |
* | | N2x0: updated the bootloader w/ latest from fw | Josh Blum | 2012-04-20 | 1 | -390/+390 |
* | | usrp2: remove settings_fifo_ctrl, meets timing | Josh Blum | 2012-04-20 | 1 | -2/+11 |
* | | fifo ctrl: Nseries timing meets with a single shortfifo | Josh Blum | 2012-04-17 | 1 | -3/+2 |
* | | usrp: work on meeting timing constraints | Josh Blum | 2012-04-10 | 5 | -25/+30 |
* | | Merge branch 'master' into next | Josh Blum | 2012-04-09 | 5 | -7/+67 |
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| * | | Merge branch 'maint' | Josh Blum | 2012-04-09 | 5 | -6/+6 |
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| | * | vita: moved clear register to overlap with nchan register | Josh Blum | 2012-04-09 | 5 | -6/+6 |
| * | | Merge branch 'maint' | Josh Blum | 2012-04-02 | 2 | -5/+5 |
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| | * | b100: fix slave fifo data xfer exit condition | Josh Blum | 2012-04-01 | 2 | -5/+5 |
| * | | fpga: extract usage summary from map file | Josh Blum | 2012-03-27 | 1 | -0/+60 |
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* | | Merge branch 'master' into next | Josh Blum | 2012-03-26 | 4 | -85/+92 |
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| * | B100: port cleanups from b100-txbug to this branch | Nick Foster | 2012-03-26 | 2 | -28/+21 |
| * | fpga: fifo_2clock handles widths and sizes in-between corgens | Josh Blum | 2012-03-25 | 1 | -21/+23 |
| * | b100: cleanup redundant logic for slwr and slrd | Josh Blum | 2012-03-25 | 1 | -2/+2 |
| * | b100: extra data pktend cycle for fifo addr | Josh Blum | 2012-03-25 | 1 | -2/+8 |
| * | b100: slave fifo fix for dst/src ready signals | Josh Blum | 2012-03-24 | 2 | -35/+41 |
* | | spi core: ready logic low one cycle earlier | Josh Blum | 2012-03-16 | 1 | -1/+1 |
* | | fifo ctrl: parameterize having a proto header | Josh Blum | 2012-03-16 | 4 | -10/+12 |
* | | fifo ctrl: rename fifo ctrl module and add sid ack param | Josh Blum | 2012-03-16 | 4 | -37/+40 |
* | | fifo ctrl: minor fixes for spi core, swap time define | Josh Blum | 2012-03-16 | 5 | -10/+10 |
* | | fifo ctrl: simplified perfs, added spi clock idle phase | Josh Blum | 2012-03-16 | 5 | -333/+341 |
* | | fifo ctrl: minor fixes from last commit | Josh Blum | 2012-03-16 | 3 | -366/+366 |
* | | fifo ctrl: spi core work, fifo ctrl perifs, usrp2 support | Josh Blum | 2012-03-16 | 5 | -370/+429 |
* | | spi: created simple spi core (sr based) | Josh Blum | 2012-03-16 | 4 | -383/+593 |
* | | fifo ctrl: simplified result packets (no tsf or sid) | Josh Blum | 2012-03-16 | 1 | -16/+7 |
* | | fifo_ctrl: switched to medfifo and separate result fifo | Josh Blum | 2012-03-16 | 3 | -92/+122 |
* | | fifo_ctrl: clear settings reg, and flow control | Josh Blum | 2012-03-16 | 3 | -10/+17 |
* | | fifo ctrl: added time compare for timed commands | Josh Blum | 2012-03-16 | 1 | -3/+7 |
* | | srb: created command queue, in and out state machines | Josh Blum | 2012-03-16 | 3 | -99/+162 |
* | | usrp2: added vrt pack/unpacker to fifo ctrl | Josh Blum | 2012-03-16 | 1 | -40/+107 |
* | | usrp2: first pass implementation of fifo control | Josh Blum | 2012-03-16 | 6 | -10/+594 |
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* | fpga: force -include_global for custom sources | Josh Blum | 2012-03-12 | 9 | -13/+16 |
* | fpga: fix custom defs in some top level makefiles | Josh Blum | 2012-03-08 | 4 | -101/+3 |
* | usrp2/nseries: added churn to meet timing | Josh Blum | 2012-02-18 | 2 | -2/+4 |
* | vita rx: trigger clear after packet tranfer | Josh Blum | 2012-02-18 | 1 | -2/+22 |
* | dsp rework: fix dspengine_8to16 to handle padded packets | Josh Blum | 2012-02-17 | 1 | -4/+3 |
* | dsp_engine: fix for upper/lower swap, and odd length packets | Matt Ettus | 2012-02-16 | 1 | -16/+20 |
* | dsp rework: added flusher to vita tx chain on clear | Josh Blum | 2012-02-15 | 1 | -8/+16 |
* | dsp rework: minor simplification in vita_tx_deframer | Josh Blum | 2012-02-13 | 1 | -4/+1 |
* | dsp rework: full-rate pipelining in vita tx deframer | Josh Blum | 2012-02-12 | 1 | -37/+51 |
* | dsp rework: pass enables into glue, update power trig, parameterize, fix modu... | Josh Blum | 2012-02-10 | 9 | -103/+145 |