| Commit message (Expand) | Author | Age | Files | Lines |
* | Fix for fifo overruns on eth rx in full duplex. Now send re-pause long befor... | matt | 2009-04-02 | 3 | -6/+14 |
* | test multiple error types | matt | 2009-04-02 | 1 | -6/+30 |
* | added a state to ensure the error signal propagates, and now we assert src_rd... | matt | 2009-04-02 | 1 | -9/+13 |
* | only write one error into fifo | matt | 2009-04-02 | 1 | -1/+1 |
* | generate error signal | matt | 2009-04-02 | 1 | -3/+3 |
* | added error output line, alternative to simultaneous sof/eof | matt | 2009-04-02 | 1 | -6/+8 |
* | logic to interface locallink fifos to our mac | matt | 2009-04-02 | 5 | -77/+264 |
* | add fifos to interface to the macs | matt | 2009-04-01 | 1 | -8/+46 |
* | rx seems to work. haven't test error frames | matt | 2009-04-01 | 2 | -40/+192 |
* | address filtering | matt | 2009-04-01 | 1 | -3/+9 |
* | only report result for 1 cycle | matt | 2009-04-01 | 1 | -0/+1 |
* | variable length delay line, based on srl16 | matt | 2009-04-01 | 1 | -0/+21 |
* | now checks the crc as well for the received side | matt | 2009-04-01 | 1 | -2/+5 |
* | checkpoint | matt | 2009-04-01 | 1 | -0/+34 |
* | we now inhibit our own sending when a received pause frame comes. _rx.v is c... | matt | 2009-03-31 | 5 | -14/+66 |
* | sample packet | matt | 2009-03-31 | 1 | -0/+66 |
* | cleaned up a little | matt | 2009-03-31 | 2 | -38/+32 |
* | tx should be fully working now | matt | 2009-03-31 | 2 | -26/+34 |
* | everything but CRC | matt | 2009-03-31 | 2 | -17/+37 |
* | nearly there | matt | 2009-03-31 | 2 | -42/+134 |
* | work in progress on a simpler gigabit-only mac | matt | 2009-03-30 | 6 | -0/+527 |
* | copied over from other project | matt | 2009-03-30 | 4 | -0/+927 |
* | new fifos copied over from other project | matt | 2009-03-30 | 17 | -0/+6741 |
* | optional (but not used) additional buffering in eth rx path. | matt | 2009-03-30 | 1 | -0/+11 |
* | comment out the RMON, which we don't use | matt | 2009-03-30 | 1 | -2/+2 |
* | copied over old one which works with icarus | matt | 2009-03-09 | 1 | -1689/+1090 |
* | timing fix. The line address in the buffers still updates now even if there ... | matt | 2009-02-26 | 1 | -1/+61 |
* | timing fix, delays the ethernet flow control by a cycle to get it across the ... | matt | 2009-02-26 | 2 | -3/+16 |
* | remove support for unmodified dbsrx because there is way too much phase noise... | matt | 2009-02-26 | 1 | -9/+1 |
* | set all debug stuff to zero | matt | 2009-02-24 | 1 | -13/+10 |
* | support for unmodified dbsrx boards | matt | 2009-02-23 | 1 | -1/+9 |
* | Merged r10418:10423 from jcorgan/pps into trunk. Adds usrp2::sync_every_pps | jcorgan | 2009-02-10 | 1 | -1/+4 |
* | work in progress | matt | 2009-01-31 | 1 | -0/+2 |
* | work in progress | matt | 2009-01-31 | 2 | -0/+382 |
* | work in progress | matt | 2009-01-31 | 1 | -0/+95 |
* | first cut at 64 bit time | matt | 2009-01-31 | 1 | -0/+63 |
* | trial fix for problem when 3 loads with 1 wait state are followed by a barrel... | matt | 2009-01-22 | 1 | -2/+2 |
* | catching up with shawn. these aren't used here anyway. | matt | 2009-01-22 | 2 | -10/+16 |
* | detect loss of signal | matt | 2009-01-22 | 1 | -1/+2 |
* | corrected link up detector | matt | 2009-01-19 | 1 | -1/+1 |
* | new cordic | matt | 2009-01-19 | 2 | -0/+2 |
* | widen cordic on tx side | matt | 2009-01-19 | 1 | -6/+12 |
* | clarify comment | matt | 2009-01-19 | 1 | -1/+1 |
* | 24 bit wide z. Can't do this parameterized, unfortunately. | matt | 2009-01-19 | 3 | -5/+132 |
* | pps sync works, meets timing | matt | 2008-12-15 | 2 | -13/+26 |
* | synchronized pps, lots of debug pins changed, works, meets timing | matt | 2008-12-14 | 1 | -49/+71 |
* | reset the phase when we shut down. Aids in sync | matt | 2008-12-13 | 2 | -3/+7 |
* | implemented "reset master clock on next PPS" so we can easily sync multiple u... | matt | 2008-12-05 | 1 | -12/+31 |
* | speed up the diagnostic signals, they were causing timing problems | matt | 2008-12-04 | 2 | -13/+65 |
* | hardware control of leds | matt | 2008-11-09 | 1 | -2/+16 |