| Commit message (Expand) | Author | Age | Files | Lines |
* | b100: fix syntax error in packet_padder36 | Josh Blum | 2012-10-09 | 1 | -1/+1 |
* | b100/e100: bump compat for inversion fix on master | Josh Blum | 2012-10-05 | 1 | -1/+1 |
* | e1x0: fix RX ADC I and Q inversion | Josh Blum | 2012-10-05 | 1 | -1/+10 |
* | Merge branch 'maint' | Josh Blum | 2012-10-05 | 1 | -4/+4 |
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| * | b100/e100: bump compat minor for inversion fix | Josh Blum | 2012-10-05 | 2 | -2/+2 |
| * | e1x0: fix RX ADC I and Q inversion | Josh Blum | 2012-10-05 | 1 | -2/+13 |
| * | b100: fix RX ADC I and Q inversion | Josh Blum | 2012-10-05 | 1 | -4/+4 |
* | | b100: fpga makefile for 2rx no tx | Josh Blum | 2012-09-01 | 4 | -1/+134 |
* | | e100: tighten timing - less routing on EM_A | Josh Blum | 2012-07-19 | 4 | -4/+4 |
* | | u1plus: added sr misc hook for clock sync | Josh Blum | 2012-07-18 | 1 | -1/+8 |
* | | e100: renamed top level for E100/E110 to E1x0 | Josh Blum | 2012-07-17 | 6 | -16/+16 |
* | | E100: squash E100/E110 top level work | Josh Blum | 2012-07-16 | 6 | -531/+84 |
* | | gpmc: squashed GPMC FIFO work for E100 | Josh Blum | 2012-07-16 | 5 | -162/+93 |
* | | gpmc: tighter timing constraints and easier to route gpmc to fifo | Josh Blum | 2012-07-16 | 2 | -26/+37 |
* | | Merge branch 'master' into next | Josh Blum | 2012-07-16 | 3 | -43/+6 |
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| * | | Merge branch 'maint' | Josh Blum | 2012-07-16 | 3 | -43/+6 |
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| | * | e100: offset gpmc to fifo writes by 2 transfers | Josh Blum | 2012-07-15 | 2 | -5/+5 |
| | * | e100: reverted commit registering in gpmc | Josh Blum | 2012-07-15 | 1 | -38/+1 |
* | | | B100: squash B100 top level work | Josh Blum | 2012-07-02 | 4 | -406/+348 |
* | | | gpif: squashed GPIF slave fifo work for B100 | Josh Blum | 2012-07-02 | 4 | -414/+319 |
* | | | fifo: added module packet_padder36 to fifo/ | Josh Blum | 2012-07-02 | 2 | -1/+157 |
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* | | b100: removed unused proto files | Josh Blum | 2012-06-13 | 3 | -390/+0 |
* | | fpga: added setting regs based simple_i2c_core | Josh Blum | 2012-05-30 | 2 | -0/+117 |
* | | fpga: added some parameterization to settings_fifo_ctrl | Josh Blum | 2012-05-30 | 1 | -3/+6 |
* | | fpga: added various models from ISE | Josh Blum | 2012-05-30 | 7 | -0/+4011 |
* | | Merge branch 'maint' | Josh Blum | 2012-05-22 | 1 | -1/+38 |
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| * | Added registers for gpmc-to-fifo interface to address sequence errors for E10... | Al Fayez | 2012-05-22 | 1 | -1/+38 |
* | | Merge branch 'maint' | Josh Blum | 2012-05-10 | 2 | -7/+9 |
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| * | e100: bump compat minor for xclock reader fix | Josh Blum | 2012-05-10 | 1 | -1/+1 |
| * | fpga: xclock fix for edge case condition | Josh Blum | 2012-05-08 | 1 | -6/+8 |
* | | e100/b100: bumped compat number for timed commands merge | Josh Blum | 2012-04-25 | 2 | -2/+2 |
* | | slave_fifo: use 2KB FIFO size instead of 1KB | Nick Foster | 2012-04-24 | 1 | -1/+1 |
* | | b100: implement packet-end/flush cycle timeout | Josh Blum | 2012-04-24 | 3 | -12/+26 |
* | | gpif: removed unused gpif related files | Josh Blum | 2012-04-24 | 8 | -908/+1 |
* | | N2x0: updated the bootloader w/ latest from fw | Josh Blum | 2012-04-20 | 1 | -390/+390 |
* | | usrp2: remove settings_fifo_ctrl, meets timing | Josh Blum | 2012-04-20 | 1 | -2/+11 |
* | | fifo ctrl: Nseries timing meets with a single shortfifo | Josh Blum | 2012-04-17 | 1 | -3/+2 |
* | | usrp: work on meeting timing constraints | Josh Blum | 2012-04-10 | 5 | -25/+30 |
* | | Merge branch 'master' into next | Josh Blum | 2012-04-09 | 5 | -7/+67 |
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| * | | Merge branch 'maint' | Josh Blum | 2012-04-09 | 5 | -6/+6 |
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| | * | vita: moved clear register to overlap with nchan register | Josh Blum | 2012-04-09 | 5 | -6/+6 |
| * | | Merge branch 'maint' | Josh Blum | 2012-04-02 | 2 | -5/+5 |
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| | * | b100: fix slave fifo data xfer exit condition | Josh Blum | 2012-04-01 | 2 | -5/+5 |
| * | | fpga: extract usage summary from map file | Josh Blum | 2012-03-27 | 1 | -0/+60 |
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* | | Merge branch 'master' into next | Josh Blum | 2012-03-26 | 4 | -85/+92 |
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| * | B100: port cleanups from b100-txbug to this branch | Nick Foster | 2012-03-26 | 2 | -28/+21 |
| * | fpga: fifo_2clock handles widths and sizes in-between corgens | Josh Blum | 2012-03-25 | 1 | -21/+23 |
| * | b100: cleanup redundant logic for slwr and slrd | Josh Blum | 2012-03-25 | 1 | -2/+2 |
| * | b100: extra data pktend cycle for fifo addr | Josh Blum | 2012-03-25 | 1 | -2/+8 |
| * | b100: slave fifo fix for dst/src ready signals | Josh Blum | 2012-03-24 | 2 | -35/+41 |