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* Merge branch 'maint'Josh Blum2012-10-051-4/+4
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| * b100/e100: bump compat minor for inversion fixJosh Blum2012-10-052-2/+2
| * e1x0: fix RX ADC I and Q inversionJosh Blum2012-10-051-2/+13
| * b100: fix RX ADC I and Q inversionJosh Blum2012-10-051-4/+4
* | b100: fpga makefile for 2rx no txJosh Blum2012-09-014-1/+134
* | e100: tighten timing - less routing on EM_AJosh Blum2012-07-194-4/+4
* | u1plus: added sr misc hook for clock syncJosh Blum2012-07-181-1/+8
* | e100: renamed top level for E100/E110 to E1x0Josh Blum2012-07-176-16/+16
* | E100: squash E100/E110 top level workJosh Blum2012-07-166-531/+84
* | gpmc: squashed GPMC FIFO work for E100Josh Blum2012-07-165-162/+93
* | gpmc: tighter timing constraints and easier to route gpmc to fifoJosh Blum2012-07-162-26/+37
* | Merge branch 'master' into nextJosh Blum2012-07-163-43/+6
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| * | Merge branch 'maint'Josh Blum2012-07-163-43/+6
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| | * e100: offset gpmc to fifo writes by 2 transfersJosh Blum2012-07-152-5/+5
| | * e100: reverted commit registering in gpmcJosh Blum2012-07-151-38/+1
* | | B100: squash B100 top level workJosh Blum2012-07-024-406/+348
* | | gpif: squashed GPIF slave fifo work for B100Josh Blum2012-07-024-414/+319
* | | fifo: added module packet_padder36 to fifo/Josh Blum2012-07-022-1/+157
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* | b100: removed unused proto filesJosh Blum2012-06-133-390/+0
* | fpga: added setting regs based simple_i2c_coreJosh Blum2012-05-302-0/+117
* | fpga: added some parameterization to settings_fifo_ctrlJosh Blum2012-05-301-3/+6
* | fpga: added various models from ISEJosh Blum2012-05-307-0/+4011
* | Merge branch 'maint'Josh Blum2012-05-221-1/+38
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| * Added registers for gpmc-to-fifo interface to address sequence errors for E10...Al Fayez2012-05-221-1/+38
* | Merge branch 'maint'Josh Blum2012-05-102-7/+9
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| * e100: bump compat minor for xclock reader fixJosh Blum2012-05-101-1/+1
| * fpga: xclock fix for edge case conditionJosh Blum2012-05-081-6/+8
* | e100/b100: bumped compat number for timed commands mergeJosh Blum2012-04-252-2/+2
* | slave_fifo: use 2KB FIFO size instead of 1KBNick Foster2012-04-241-1/+1
* | b100: implement packet-end/flush cycle timeoutJosh Blum2012-04-243-12/+26
* | gpif: removed unused gpif related filesJosh Blum2012-04-248-908/+1
* | N2x0: updated the bootloader w/ latest from fwJosh Blum2012-04-201-390/+390
* | usrp2: remove settings_fifo_ctrl, meets timingJosh Blum2012-04-201-2/+11
* | fifo ctrl: Nseries timing meets with a single shortfifoJosh Blum2012-04-171-3/+2
* | usrp: work on meeting timing constraintsJosh Blum2012-04-105-25/+30
* | Merge branch 'master' into nextJosh Blum2012-04-095-7/+67
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| * | Merge branch 'maint'Josh Blum2012-04-095-6/+6
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| | * vita: moved clear register to overlap with nchan registerJosh Blum2012-04-095-6/+6
| * | Merge branch 'maint'Josh Blum2012-04-022-5/+5
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| | * b100: fix slave fifo data xfer exit conditionJosh Blum2012-04-012-5/+5
| * | fpga: extract usage summary from map fileJosh Blum2012-03-271-0/+60
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* | Merge branch 'master' into nextJosh Blum2012-03-264-85/+92
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| * B100: port cleanups from b100-txbug to this branchNick Foster2012-03-262-28/+21
| * fpga: fifo_2clock handles widths and sizes in-between corgensJosh Blum2012-03-251-21/+23
| * b100: cleanup redundant logic for slwr and slrdJosh Blum2012-03-251-2/+2
| * b100: extra data pktend cycle for fifo addrJosh Blum2012-03-251-2/+8
| * b100: slave fifo fix for dst/src ready signalsJosh Blum2012-03-242-35/+41
* | spi core: ready logic low one cycle earlierJosh Blum2012-03-161-1/+1
* | fifo ctrl: parameterize having a proto headerJosh Blum2012-03-164-10/+12
* | fifo ctrl: rename fifo ctrl module and add sid ack paramJosh Blum2012-03-164-37/+40
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