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* u2/u2p: move nearly all setting regs onto dsp_clkMatt Ettus2011-10-262-30/+37
* u2/u2p: remove dead comments and codeMatt Ettus2011-10-262-84/+16
* dsp: make rounding a single bit work againMatt Ettus2011-10-261-5/+13
* dsp: new rounding. more complex, but better propertiesMatt Ettus2011-10-262-3/+80
* dsp_engine: don't use SD rounding in 8 bit mode, so we can have a flat noise ...Matt Ettus2011-10-262-4/+5
* dsp_engine: trailer change to fit standardMatt Ettus2011-10-261-2/+2
* dsp_engine fix rst -> reset, default to read addressMatt Ettus2011-10-262-3/+3
* dspengine: move the register to VITA_RX_CTRL + 9 instead of + 3 which is occu...Matt Ettus2011-10-261-1/+1
* dspengine: insert into the rx chainMatt Ettus2011-10-264-2/+29
* dsp_engine: new way of doing DSP operations on VITA packets. Example does 16...Matt Ettus2011-10-267-3/+899
* dsp: ability to set rx dc offset to a fixed valueMatt Ettus2011-10-261-1/+2
* usrp2: fix typo in top level core filesJosh Blum2011-10-262-2/+2
* connect and map b100 and e100 front-panel ledsJosh Blum2011-10-112-2/+2
* usrp1: copy regs files into common and fix include pathsJosh Blum2011-09-2812-20/+393
* E100: GPSDO serial port level conversionNick Foster2011-09-282-2/+9
* B100: use gpif_misc on R2 hw, invert direction of gpif_misc pinsNick Foster2011-09-191-2/+2
* u1e,u1p: turn off debug pins, misc cleanupsMatt Ettus2011-09-082-26/+10
* u1p: proper format in ucf fileMatt Ettus2011-09-085-4/+474
* u1e: relax GPMC constraints, eases P&RMatt Ettus2011-09-021-10/+10
* u1e: separate build for E100 and E110, just a different FPGAMatt Ettus2011-09-012-1/+102
* e100: squashed work on bus implementation on GPMCJosh Blum2011-08-2922-984/+545
* fix warning on dat_o in atr_controller16.vJosh Blum2011-08-291-3/+2
* fpga: minor tweaks to build systemJosh Blum2011-08-262-2/+4
* fix typoMatt Ettus2011-08-261-21/+21
* all: tie unused ram inputs to 1 instead of zero, helps routingMatt Ettus2011-08-262-22/+22
* b100: gpif_rst resynced to gpif_clkMatt Ettus2011-08-261-1/+1
* dsp: slow down the time constant of the DC offset correction by a factor of 1...Matt Ettus2011-08-261-1/+1
* usrp2: reconnect frontend calibration, timing meetsJosh Blum2011-08-265-6/+6
* e100: continuation of the atr fix to get e100 to buildJosh Blum2011-08-151-2/+2
* usrp2: bump FPGA minor number to 2 for patch releaseJosh Blum2011-08-152-2/+2
* connect unused BRAM inputs to 1s to save routing logicJosh Blum2011-08-151-1/+1
* dsp: clear cic_decim when not enabledMatt Ettus2011-08-151-4/+4
* N2x0: print constraints summary from makefileJosh Blum2011-08-151-0/+1
* N2x0: added a Makefile to build all N2x0 projects (make -j4)Josh Blum2011-08-151-0/+22
* N2x0: delay ADC A inversion so A and B are latched in the sameJosh Blum2011-08-151-3/+5
* B100/E100: fix ATR RX mode pins not connectedNick Foster2011-08-102-4/+4
* time: register time output to help fpga timingMatt Ettus2011-07-281-2/+5
* vrt: delay the late signal to help with timingMatt Ettus2011-07-281-5/+20
* dsp: allow tx iq balance to be removed at compile timeMatt Ettus2011-07-281-23/+38
* dsp: option to remove iq compensation at compile timeMatt Ettus2011-07-281-35/+40
* time64: reverted mimo sync changes to time64Josh Blum2011-07-281-3/+1
* u2/u2p: speed up time_64, and remove readbacks on simple_gemac wb regsMatt Ettus2011-07-282-11/+13
* simple_gemac: remove old 19-bit wide wrapperMatt Ettus2011-07-284-402/+0
* usrp2: remove old unused readback mux valueJosh Blum2011-07-282-2/+2
* usrp2: bump minor version number for changesJosh Blum2011-07-282-2/+2
* vita_rx_ctrl: use an extra cmd bit to signal stopJosh Blum2011-07-281-7/+7
* usrp2: fixed swapped tx/rx signals for nsgpioJosh Blum2011-07-282-2/+2
* simple_gemac: add parameter to allow disabling rx flow control at compile timeMatt Ettus2011-07-271-6/+10
* u2/u2p: apply atr/gpio changes to u2pMatt Ettus2011-07-272-14/+7
* atr: forgot to delete this lineMatt Ettus2011-07-271-1/+0