| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| | * | u1e: hook up tester controls | Matt Ettus | 2011-02-17 | 2 | -9/+13 |
| | * | move declarations to before use | Matt Ettus | 2011-02-16 | 1 | -8/+8 |
| | * | hook up under/overruns for debug purposes | Matt Ettus | 2011-02-16 | 2 | -8/+12 |
| | * | e100: integrate loopback and timed testing into main image | Matt Ettus | 2011-02-16 | 5 | -81/+112 |
| | * | Fix endianess for packet length and sequence number for e100 timed image. | Philip Balister | 2011-02-16 | 1 | -8/+8 |
| | * | put these files in the right place. newfifo is long gone. | Matt Ettus | 2011-02-16 | 9 | -5/+5 |
| * | | remove references to old directory | Matt Ettus | 2011-03-03 | 6 | -7/+1 |
| * | | all: removed old unused fifos | Matt Ettus | 2011-03-03 | 13 | -1140/+1 |
| * | | all: short fifos on front and back of fifo36_to_fifo19 | Matt Ettus | 2011-03-03 | 1 | -15/+33 |
| * | | u2plus: catch up with ethfifo changes which were on u2 | Matt Ettus | 2011-03-03 | 1 | -39/+4 |
| * | | u2/u2p: remove duplicated short fifo | Matt Ettus | 2011-03-03 | 1 | -13/+4 |
| * | | u2/u2p: shortfifos in fifo36_to_ll8, no more _n junk | Matt Ettus | 2011-03-03 | 2 | -36/+45 |
| * | | make big tx fifo the one doing the clock crossing | Matt Ettus | 2011-03-03 | 2 | -12/+4 |
| * | | u2/u2p: rxdsp/cpu/err muxing now prioritizes cpu and err over rxdsp | Matt Ettus | 2011-03-03 | 1 | -7/+10 |
| * | | u2/u2p: removed unneeded eth rx fifo | Matt Ettus | 2011-03-03 | 1 | -10/+4 |
| * | | u2/u2p: switch over to 36 bit wide ethernet wrapper | Matt Ettus | 2011-03-03 | 3 | -79/+85 |
| * | | Merge branch 'ethfifo_reorg' of ettus.sourcerepo.com:ettus/fpgapriv into ethf... | Matt Ettus | 2011-03-03 | 1 | -5/+6 |
| |\ \ |
|
| | * | | ethfifo_reorg: switch buffer int2 lastline to work as a length parameter | Josh Blum | 2011-03-03 | 1 | -5/+6 |
| * | | | u2/u2p: packet realignment moved into the simple_gemac_wrapper19 | Matt Ettus | 2011-03-03 | 2 | -13/+10 |
| |/ / |
|
| * | | u2/u2p: get rid of redeclaration | Matt Ettus | 2011-03-03 | 1 | -1/+0 |
| * | | u2/u2p: ll8 now all active high, removed extra shortfifo from eth wrapper | Matt Ettus | 2011-03-03 | 2 | -29/+10 |
| * | | u2/u2p: short fifos put on both sides of ll8_to_fifo19 | Matt Ettus | 2011-03-03 | 1 | -27/+44 |
| * | | u2/u2p: shrunk ETH TX FIFO, further u2/u2p harmonization | Matt Ettus | 2011-02-21 | 3 | -20/+19 |
| * | | u2/u2p: inserted short fifo into the packet inspector path to help routing an... | Matt Ettus | 2011-02-17 | 1 | -1/+13 |
| * | | increase compat number for double dsp change | Matt Ettus | 2011-02-17 | 2 | -2/+2 |
| * | | u2/u2p: reduce unneeded RX DSP buffering | Matt Ettus | 2011-02-17 | 2 | -2/+2 |
| * | | u2p: 2nd DSP now in u2p as well | Matt Ettus | 2011-02-17 | 1 | -25/+56 |
| * | | added port_sel param to dsp framer | Josh Blum | 2011-02-17 | 2 | -4/+5 |
| * | | u2/u2p: added 2nd DSP unit | Matt Ettus | 2011-02-17 | 1 | -0/+34 |
| * | | u2/u2p: renamed and split some rx signals to prepare for 2nd DSP | Matt Ettus | 2011-02-17 | 1 | -25/+22 |
| * | | u2/u2p: proper hookup of vita_rx_chain | Matt Ettus | 2011-02-17 | 3 | -12/+12 |
| * | | clean up rx dsp and some other nets in prep for dual dsp | Matt Ettus | 2011-02-16 | 4 | -86/+98 |
| * | | register map changes to fit in the 2nd rx dsp | Matt Ettus | 2011-02-15 | 1 | -15/+19 |
| * | | packet_router: added support for two dsps into router | Josh Blum | 2011-02-15 | 3 | -16/+24 |
| |/ |
|
| * | separate clear for tx and rx, and add a global reset from the host | Matt Ettus | 2011-02-02 | 1 | -10/+19 |
| * | usrp-e100: added missing newfifo files to list, added missing signals for timed | Josh Blum | 2011-01-26 | 2 | -1/+7 |
| * | usrp-e100: added 32bit test read/write register, fixes to get building | Josh Blum | 2011-01-25 | 1 | -7/+17 |
| * | reorganized u1e register space to make room for 64 settingregs | Matt Ettus | 2011-01-25 | 1 | -12/+15 |
| * | believed to fix fifo swizzling with partially empty lines | Matt Ettus | 2011-01-21 | 3 | -25/+114 |
| * | usrp-e100: added readback mux 32 as slave 7 for time readback | Josh Blum | 2011-01-14 | 3 | -4/+90 |
| * | xbar and valve: fix switching delayed by active signal | Josh Blum | 2011-01-11 | 2 | -9/+12 |
| * | usrp-n210: added power-on-reset controller, reset all wb perifs | Josh Blum | 2011-01-10 | 1 | -10/+13 |
| * | usrp-n210: uploaded most recent bootloader rmi | Josh Blum | 2011-01-10 | 1 | -167/+204 |
| * | usrp-n210: use cpu rst on the wb+icap, uploaded latest bootloader rmi | Josh Blum | 2011-01-09 | 2 | -169/+172 |
| * | packet_router: tweak mode SR (its only 1 bit) | Josh Blum | 2011-01-07 | 1 | -3/+2 |
| * | Merge branch 'cordic_policy' into next | Josh Blum | 2011-01-04 | 5 | -49/+83 |
| |\ |
|
| | * | hook up sampled pps in u2plus, remove unused priority encoder, minor cleanups | Matt Ettus | 2010-12-30 | 2 | -26/+18 |
| | * | processor can read back vita_time at last pps | Matt Ettus | 2010-12-30 | 2 | -11/+11 |
| | * | run should actually turn on now any time in the IBS_RUN state | Matt Ettus | 2010-12-29 | 1 | -11/+8 |
| | * | gyrations to get it to meet timing | Matt Ettus | 2010-12-29 | 1 | -13/+23 |
