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* better debug pinsMatt Ettus2010-09-232-7/+11
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* watch the ethernet chip select on our debug busMatt Ettus2010-09-233-6/+8
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* fix timing issue on DAC outputs with rev 2. This puts the whole system on a ↵Matt Ettus2010-09-212-50/+25
| | | | 90 degree phase shift
* send all gpmc signals to mictorMatt Ettus2010-09-164-0/+201
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* updated pins to match rev2, removed dip switch, etc. seems to compile ok.Matt Ettus2010-09-093-137/+130
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* pins are different on rev2Matt Ettus2010-09-091-264/+4
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* fixed makefile to compile with our new systemMatt Ettus2010-09-071-44/+36
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* add register to tell host about compatibility level and which image we are usingMatt Ettus2010-08-301-5/+14
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* move declaration to make loopback compileMatt Ettus2010-08-271-1/+2
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* Merge branch 'tx_policy' into u1eMatt Ettus2010-08-253-29/+23
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * tx_policy: (21 commits) clean up DAC inversion and swapping to match schematics Clean up iq swapping on RX. It is now swapped in the top level. widened muxes to 4 bits to match tx side and handle more ADCs in future rx error context packets should not be marked as errors in the fifo added compat number to usrp2 readback mux makefile dependency fix for second expansion provide a way to get out of the error state without processor intervention sequence number reset upon programming streamid attempt at avoiding infinite error messages implemented "next packet" and "next burst" policies sequence errors can happen on start of burst as well. more informative error codes cleaner error handling introduce new error types test mux and gen_context_pkt this is an output file, it shouldn't be checked in insert protocol engine flags when requested move the streamid so it isn't at the same address as clear_state connect the demux fix a typo tx error packets now muxed into the ethernet stream back to the host ... Conflicts: usrp2/top/u2_rev3/u2_core_udp.v
| * clean up DAC inversion and swapping to match schematicsMatt Ettus2010-08-251-3/+6
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| * Clean up iq swapping on RX. It is now swapped in the top level.Matt Ettus2010-08-253-27/+18
| | | | | | | | widened muxes to 4 bits to match tx side and handle more ADCs in future
| * Merge branch 'features' into tx_policyMatt Ettus2010-08-172-3/+6
| |\ | | | | | | | | | | | | | | | * features: added compat number to usrp2 readback mux makefile dependency fix for second expansion
| | * added compat number to usrp2 readback muxJosh Blum2010-08-091-2/+5
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| | * makefile dependency fix for second expansionJosh Blum2010-08-091-1/+1
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| * | rx error context packets should not be marked as errors in the fifoMatt Ettus2010-08-111-1/+1
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| * provide a way to get out of the error state without processor interventionMatt Ettus2010-07-291-1/+4
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| * sequence number reset upon programming streamidMatt Ettus2010-07-282-5/+11
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| * attempt at avoiding infinite error messagesMatt Ettus2010-07-281-5/+14
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| * implemented "next packet" and "next burst" policiesMatt Ettus2010-07-283-24/+50
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| * sequence errors can happen on start of burst as well.Matt Ettus2010-07-281-1/+1
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| * more informative error codesMatt Ettus2010-07-282-6/+8
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| * cleaner error handlingMatt Ettus2010-07-281-27/+28
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| * introduce new error typesMatt Ettus2010-07-283-34/+80
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| * test mux and gen_context_pktMatt Ettus2010-07-281-3/+22
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| * this is an output file, it shouldn't be checked inMatt Ettus2010-07-281-5506/+0
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| * insert protocol engine flags when requestedMatt Ettus2010-07-281-2/+6
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| * move the streamid so it isn't at the same address as clear_stateMatt Ettus2010-07-282-2/+2
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| * connect the demuxMatt Ettus2010-07-281-1/+1
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| * fix a typoMatt Ettus2010-07-283-4/+4
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| * tx error packets now muxed into the ethernet stream back to the hostMatt Ettus2010-07-284-47/+66
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| * checkpoint. New context packet generator to report underruns and other errorsMatt Ettus2010-07-282-0/+107
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* | Merge branch 'u1e_merge' into u1eMatt Ettus2010-08-2512-5605/+340
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | * u1e_merge: no need for protocol headers since we're not doing ethernet match the signal names in this design debug pins cleanup properly integrate the new tx chain catch up with tx_policy
| * | no need for protocol headers since we're not doing ethernetMatt Ettus2010-08-241-1/+1
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| * | match the signal names in this designMatt Ettus2010-08-231-3/+3
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| * | debug pins cleanupMatt Ettus2010-08-231-3/+3
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| * | properly integrate the new tx chainMatt Ettus2010-08-191-31/+27
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| * | catch up with tx_policyMatt Ettus2010-08-1911-5572/+311
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* | attach run_tx and run_rx to ledsMatt Ettus2010-08-171-1/+1
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* | connect atrMatt Ettus2010-08-171-1/+1
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* | delay the q channel to make the channels line up on the AD9862Matt Ettus2010-08-171-1/+6
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* | this is necessary for some reasonMatt Ettus2010-08-131-1/+2
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* | connect the setting reg to the real clock and resetMatt Ettus2010-08-111-1/+1
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* | enlarge loopback fifoMatt Ettus2010-08-101-4/+1
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* | Merge branch 'ise12' into u1eMatt Ettus2010-07-199-45/+163
|\| | | | | | | | | | | | | | | | | | | | | | | * ise12: move declaration ahead of use put run_tx and run_rx on the displayed LEDs remove warnings add mux and demux to build mux multiple fifo streams into one. Allows priority or round robin split fifo into 2 streams based on first line in each packet precompute udp checksums barely fails timing on gigE/10 and gigE/12, larger fail on udp/10, but all seem to work ok
| * move declaration ahead of useMatt Ettus2010-07-191-5/+5
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| * put run_tx and run_rx on the displayed LEDsMatt Ettus2010-07-191-3/+4
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| * remove warningsMatt Ettus2010-07-162-3/+3
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| * add mux and demux to buildMatt Ettus2010-07-151-0/+2
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| * mux multiple fifo streams into one. Allows priority or round robinMatt Ettus2010-07-151-0/+57
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