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| * | | | put 64 bit timer for vita49 on the settings busMatt Ettus2009-11-053-8/+17
| * | | | VITA49 rx (and tx skeleton) copied over from quad radioMatt Ettus2009-11-057-0/+1026
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* | | | connected spi pins, but the spi core still needs to be redone for 16 bit inte...Matt Ettus2010-03-253-40/+60
* | | | debug pinsMatt Ettus2010-02-251-2/+3
* | | | enable was on the wrong address pin, needs to be the highest order oneMatt Ettus2010-02-251-2/+2
* | | | invert the pushbuttons since they are active lowMatt Ettus2010-02-251-2/+2
* | | | gpmc debug pinsMatt Ettus2010-02-252-4/+14
* | | | point to the new filesMatt Ettus2010-02-251-0/+2
* | | | fix syntax error which icarus allowed (filed a bug with them)Matt Ettus2010-02-251-7/+9
* | | | loopback and testMatt Ettus2010-02-252-7/+38
* | | | corrected logicMatt Ettus2010-02-251-17/+7
* | | | edge sync on done signals so we only fill/empty one bufferMatt Ettus2010-02-252-2/+32
* | | | Switched xilinx primitives because they order the bits funny in the other oneMatt Ettus2010-02-251-48/+79
* | | | ISE chokes on the pure verilog version so we use the macroMatt Ettus2010-02-251-4/+49
* | | | First cut at passing data buffers around on GPMC busMatt Ettus2010-02-256-25/+165
* | | | Merge branch 'master' into u1eMatt Ettus2010-02-232-1/+3
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| * | | proper initialization of the ramMatt Ettus2010-02-232-1/+2
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| * | ignore emacs cruftMatt Ettus2010-02-081-0/+2
* | | first cut at making a bidirectional 2 port ram for the gpmc data interfaceMatt Ettus2010-02-233-6/+63
* | | use our fancy new debug portsMatt Ettus2010-02-231-0/+3
* | | settings bus with 16 bit wishbone interface, put on the main wishbone in u1eMatt Ettus2010-02-223-3/+68
* | | remove the #1 delay in all the regs. They just slow down sims.Matt Ettus2010-02-224-96/+90
* | | Modified nsgpio.v to support 16 bit little endian bus interface.Matt Ettus2010-02-221-0/+124
* | | GPIOs now on the wishbone interfaceMatt Ettus2010-02-224-37/+54
* | | added gpio control to the wishboneMatt Ettus2010-02-182-11/+14
* | | Added I2C, UART, debug pins, misc wishbone stuffMatt Ettus2010-02-183-48/+187
* | | allow default uart clock dividerMatt Ettus2010-02-181-6/+7
* | | Fixed paths to help icarus find opencores and xilinx models. Added Xilinx gl...Matt Ettus2010-02-182-4/+7
* | | speed up the presentation of registered wb data to the gpmcMatt Ettus2010-02-172-13/+20
* | | wishbone bridge now with minimal functionality. Need to checkMatt Ettus2010-02-168-11/+121
* | | first cut at gpmc <-> wb bridge, split u1e into core, top, and tbMatt Ettus2010-02-167-34/+160
* | | copied over from safe_u1eMatt Ettus2010-02-164-0/+553
* | | block ram interface to GPMCMatt Ettus2010-02-161-2/+6
* | | basic read support for the GPMC, responds with 16'hBEEFMatt Ettus2010-02-161-2/+8
* | | reorg pin defsMatt Ettus2010-02-141-94/+102
* | | connect GPMC pins to debug busMatt Ettus2010-02-142-76/+94
* | | organized the pins in the ucf by functionMatt Ettus2010-02-091-56/+72
* | | builds a successful led blinkerMatt Ettus2010-02-093-2/+4
* | | first cut at blinking ledsMatt Ettus2010-02-094-345/+237
* | | skeletons that don't work yetMatt Ettus2010-02-092-0/+607
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* | Merge branch 'usrp1' into usrp2Josh Blum2010-01-22219-2/+27517
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| * | Moved usrp1 fpga files into usrp1 subdir.Josh Blum2010-01-22218-0/+0
| * | Added git ignore files auto created from svn:ignore properties.git repository hosting2009-08-1312-0/+97
| * | Revert erroneous file included in r11424jcorgan2009-07-141-6/+3
| * | Reorganization of debian package directoryjcorgan2009-07-141-3/+6
| * | Built and checked in new rbfs that fix ticket:248 and ticket:290. The rbfs ar...eb2009-05-122-0/+0
| * | Merged r10504:10528 from michaelld/fix_local_data_install into trunk. Trunk ...jcorgan2009-02-263-33/+64
| * | Allows for changing the interpolation rate dynamically. Stop the pipeline, s...matt2008-09-021-3/+4
| * | Merged features/inband-usb -r6431:8293 into trunk.eb2008-04-3023-1325/+1021
| * | Restores 8-bit sample format support to FPGA code. Synthesized with 7.1SP1.jcorgan2007-11-105-1/+1