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* address filteringmatt2009-04-011-3/+9
* only report result for 1 cyclematt2009-04-011-0/+1
* variable length delay line, based on srl16matt2009-04-011-0/+21
* now checks the crc as well for the received sidematt2009-04-011-2/+5
* checkpointmatt2009-04-011-0/+34
* we now inhibit our own sending when a received pause frame comes. _rx.v is c...matt2009-03-315-14/+66
* sample packetmatt2009-03-311-0/+66
* cleaned up a littlematt2009-03-312-38/+32
* tx should be fully working nowmatt2009-03-312-26/+34
* everything but CRCmatt2009-03-312-17/+37
* nearly therematt2009-03-312-42/+134
* work in progress on a simpler gigabit-only macmatt2009-03-306-0/+527
* copied over from other projectmatt2009-03-304-0/+927
* new fifos copied over from other projectmatt2009-03-3017-0/+6741
* optional (but not used) additional buffering in eth rx path.matt2009-03-301-0/+11
* comment out the RMON, which we don't usematt2009-03-301-2/+2
* copied over old one which works with icarusmatt2009-03-091-1689/+1090
* timing fix. The line address in the buffers still updates now even if there ...matt2009-02-261-1/+61
* timing fix, delays the ethernet flow control by a cycle to get it across the ...matt2009-02-262-3/+16
* remove support for unmodified dbsrx because there is way too much phase noise...matt2009-02-261-9/+1
* set all debug stuff to zeromatt2009-02-241-13/+10
* support for unmodified dbsrx boardsmatt2009-02-231-1/+9
* Merged r10418:10423 from jcorgan/pps into trunk. Adds usrp2::sync_every_ppsjcorgan2009-02-101-1/+4
* work in progressmatt2009-01-311-0/+2
* work in progressmatt2009-01-312-0/+382
* work in progressmatt2009-01-311-0/+95
* first cut at 64 bit timematt2009-01-311-0/+63
* trial fix for problem when 3 loads with 1 wait state are followed by a barrel...matt2009-01-221-2/+2
* catching up with shawn. these aren't used here anyway.matt2009-01-222-10/+16
* detect loss of signalmatt2009-01-221-1/+2
* corrected link up detectormatt2009-01-191-1/+1
* new cordicmatt2009-01-192-0/+2
* widen cordic on tx sidematt2009-01-191-6/+12
* clarify commentmatt2009-01-191-1/+1
* 24 bit wide z. Can't do this parameterized, unfortunately.matt2009-01-193-5/+132
* pps sync works, meets timingmatt2008-12-152-13/+26
* synchronized pps, lots of debug pins changed, works, meets timingmatt2008-12-141-49/+71
* reset the phase when we shut down. Aids in syncmatt2008-12-132-3/+7
* implemented "reset master clock on next PPS" so we can easily sync multiple u...matt2008-12-051-12/+31
* speed up the diagnostic signals, they were causing timing problemsmatt2008-12-042-13/+65
* hardware control of ledsmatt2008-11-091-2/+16
* u2_rev2 now works againmatt2008-10-231-1/+3
* make rev2 compile againmatt2008-10-221-1/+2
* added in mux for DACsmatt2008-10-181-4/+16
* Added firmware support for adc_mux to handle swapping I/Q, etc. Modified dsp_...eb2008-10-151-5/+14
* New serdes status interrupt, clk_status interrupt. New capability to flush t...matt2008-10-114-8/+16
* moved to appropriate placesmatt2008-10-081-0/+0
* added the basic wb<-->extram interface and a serdes interrupt to tell link st...matt2008-10-084-40/+66
* catch up with latest pin defs of u2_corematt2008-09-211-1/+3
* attach a 16 bit device to the bus and make it look like a 32 bit devicematt2008-09-211-0/+36
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