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| | | * Modified phase shift of DCM1 to -64 which is intended to give more timing mar...Ian Buckley2010-11-111-1/+1
| | | * Enabled phase offset adjustment on DCM_INST1 which drives the external Fast S...Ian Buckley2010-11-111-12/+12
| | | * Added to DCM's and some BUFG's to align the internal 125MHz clock edge with i...Ian Buckley2010-11-114-5/+100
| | | * Enhanced test bench to be more like real world applicationIan Buckley2010-11-112-7/+14
| | | * hangedddddddextrnal fifo size to use full NoBL SRAMianb2010-11-111-1/+1
| | | * Corrected extfifo code so that all registers that are on SRAM signals are pac...ianb2010-11-115-46/+59
| | | * capacity logic fixMatt Ettus2010-11-111-1/+1
| | | * Added capacity to the module pinoutIan Buckley2010-11-111-3/+4
| | | * Added a bunch of debug signals.Ian Buckley2010-11-114-9/+19
| | | * Regenerated FIFO with lower trigger level for almost full flag to reflect log...Ian Buckley2010-11-118-236/+113
| | | * Regenerated FIFO's for extfifo.Ian Buckley2010-11-1111-726/+15
| | | * Edited FIFO instance to delete port that was not regenerated after reconfigur...Ian Buckley2010-11-111-1/+0
| | | * Adding in files that probably didn;t exist in the ISE10.1 version of coregenIan Buckley2010-11-115-0/+808
| | | * Bringing all coregen files checked in into syncIan Buckley2010-11-1110-137/+60
| | | * Found bug due to not accounting for the correct number of possible in flight ...Ian Buckley2010-11-117-52/+110
| | | * checkin of generated coregen filesMatt Ettus2010-11-1118-8/+556
| | | * External FIFO tested in simulation and on USRP2 from decimation 64->8 with cu...Ian Buckley2010-11-1118-236/+7297
| | | * Checkpoint checkin.Ian Buckley2010-11-1113-0/+1507
| | | * get it to buildMatt Ettus2010-11-115-5/+309
| | | * moved forward from the old branchMatt Ettus2010-11-118-4/+876
| | | * reverting part of the reversion of the spi settings.Matt Ettus2010-11-101-2/+2
| | | * u2p needs the bigger regs for some reasonMatt Ettus2010-11-101-4/+4
| | | * need to enable both 16 and 32 bit spi interfaces -- 16 used in u1e, 32 in u2 ...Matt Ettus2010-11-101-0/+1
| | | * occ needs to be 2 bits wide on a 36 bit fifo interface.Matt Ettus2010-11-101-1/+2
| | | * Merge branch 'u1e' into merge_u1eMatt Ettus2010-11-1064-215/+3325
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| | | | * invert led signals because they are active lowMatt Ettus2010-11-091-1/+1
| | | | * duhMatt Ettus2010-11-041-1/+1
| | | * | remove old commented out codeMatt Ettus2010-11-092-184/+2
| | | * | fix timing problem on DAC output busMatt Ettus2010-11-091-2/+2
| | | * | U2P: Working ICAP bootloader. Should be ready for release.Nick Foster2010-10-081-224/+236
| | | * | U2P: remember your semicolons.Nick Foster2010-10-071-1/+1
| | | * | U2P: modified ICAP. turns out ICAP needs clock disabled while CE is not asser...Nick Foster2010-10-072-206/+238
| | | * | separate the bootloader image into another fileMatt Ettus2010-10-072-204/+205
| | | * | U2P: newest bootloader with support for 32Mbit flashNick Foster2010-10-051-157/+196
| | | * | Fixed PPS. Instantiation was miscapitalized.Nick Foster2010-08-271-1/+1
| | | * | invert adc_a because it is inverted on schematic. Also clean up extraneousMatt Ettus2010-08-251-15/+18
| | | * | SWAP DAC A and B, invert B to match schematicsMatt Ettus2010-08-251-3/+4
| | | * | Use new tx_policy stuff, reassigned leds to be just like U2Matt Ettus2010-08-252-36/+34
| | | * | Merge branch 'tx_policy' into u2p_txpolicyMatt Ettus2010-08-2513-5600/+333
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| | | * | | Added a sanity checker Python script.Nick Foster2010-08-244-3/+67
| | | * | | Ensure ethernet LED pin has 12mA outputNick Foster2010-08-241-1/+1
| | | * | | Added 12mA current spec to eth phy LED pin.Nick Foster2010-08-202-2/+3
| | | * | | Fixed u2plus_core.v to use quad_uart instead of simple_uart.Nick Foster2010-08-121-1/+1
| | | * | | quad uart instead of single, for the extra on board serial portsMatt Ettus2010-08-114-10/+82
| | | * | | Added DCM reset line to sr.Nick Foster2010-07-291-3/+5
| | | * | | Fix for SPI SS > 8 bits wideNick Foster2010-07-281-2/+2
| | | * | | latest bootloader in core, fixed eth_led to be active high, connected eth clkNick Foster2010-07-282-39/+167
| | | * | | Merge branch 'u2p' of ettus.sourcerepo.com:ettus/fpgapriv into u2pNick Foster2010-07-271-0/+4
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| | | | * | | capitalization matchingMatt Ettus2010-07-211-1/+5
| | | * | | | fix timing races on ADC and DAC pinsNick Foster2010-07-271-10/+20
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