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* packet_router: harmless logic tweaksJosh Blum2010-12-122-11/+8
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* packet_router: reverted enable change to dsp framer, it was already correctJosh Blum2010-12-121-2/+1
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* packet_router: raise enable for bram reads the cycle before as wellJosh Blum2010-12-112-2/+4
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* packet_router: added fifo before cpu_out, tweaked inspection logicJosh Blum2010-12-101-25/+29
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* packet_router: gave the inspector a 4th output which is CPU onlyJosh Blum2010-12-101-83/+123
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* Merge branch 'ise12' into packet_routerJosh Blum2010-12-1012-107/+241
|\ | | | | | | | | | | Conflicts: usrp2/top/u2_rev3/Makefile usrp2/top/u2_rev3/u2_core.v
| * time sync on usrp2 as well, added debug pins to time sync.Matt Ettus2010-12-102-2/+10
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| * slave side can now syncMatt Ettus2010-12-102-13/+33
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| * Only do udp now, renamed old ports to exp_time_*Matt Ettus2010-12-092-2/+2
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| * udp is now the defaultMatt Ettus2010-12-092-2/+2
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| * remove old raw ethernet versionMatt Ettus2010-12-092-882/+0
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| * reimplemented mimo time transfer to handle 64 bits. Still needsMatt Ettus2010-12-095-71/+164
| | | | | | | | to sync on the received side.
| * renamed exp_pps_* to be exp_time_*, which is the mimo synchronization signalMatt Ettus2010-12-095-22/+22
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| * Merge branch 'time_compare_speedup' into ise12Matt Ettus2010-12-091-2/+16
| |\ | | | | | | | | | | | | * time_compare_speedup: should safely delay the late signal which was causing timing problems
| | * should safely delay the late signal which was causing timing problemsMatt Ettus2010-12-061-2/+16
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| * | u2plus: clock lock pin capitalization failNick Foster2010-12-062-2/+2
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* | packet_router: renamed top level files in an attempt to merge cleanlyJosh Blum2010-12-104-1091/+209
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* | packet_router: added status readback for mode, incremented compat numberJosh Blum2010-11-242-1/+2
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* | packet_router: split the control register into misc, cpu hs out, cpu hs inpJosh Blum2010-11-241-10/+24
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* | packet_router: modification for sequence number and vrt header offsetJosh Blum2010-11-231-1/+1
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* | packet_router: it makes more sense to connect the control flags this way nowJosh Blum2010-11-231-13/+6
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* | packet_router: program the dsp udp port and ip addr through setting registersJosh Blum2010-11-232-32/+34
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* | reduce warnings, modernize testbenchMatt Ettus2010-11-236-28/+25
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* | packet_router: mux the crossbar input after the protocol framerJosh Blum2010-11-231-2/+12
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* | allow any unicast packet through.Matt Ettus2010-11-234-5/+40
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* | packet_router: moved udp tx proto machine into packet router, replaced ↵Josh Blum2010-11-232-18/+69
| | | | | | | | udp_wrapper in top level with some fifo conversion stuff
* | packet_router: moved dsp framer into a module, added clr to splitter and renamedJosh Blum2010-11-234-93/+110
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* | packet_router: implemented crossbar and valve module, moved sreg into router ↵Josh Blum2010-11-233-61/+72
| | | | | | | | module
* | packet valve. will drop incoming data if shut off.Matt Ettus2010-11-231-0/+28
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* | abstract out the crossbar functionalityMatt Ettus2010-11-231-0/+40
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* | packet_router: transplanted the async error interface, its now sent into the ↵Josh Blum2010-11-232-17/+21
| | | | | | | | packet router to be muxed to com out
* | packet_router: added a way to program in the ip and mac addrs, and added ↵Josh Blum2010-11-231-2/+17
| | | | | | | | inspector check
* | packet_router: fixed sof bug for cpu (== 1), some logic tweaks, added debugJosh Blum2010-11-232-10/+44
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* | packet_router: registered control flags, added clear to all state machinesJosh Blum2010-11-232-14/+26
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* | packet_router: added splitter and mux for slow path stuff (also fixed typo ↵Josh Blum2010-11-232-10/+95
| | | | | | | | in crossbar input)
* | packet_router: renamed inspector output signals and connected (for now) to ↵Josh Blum2010-11-232-22/+52
| | | | | | | | cpu, dsp, crs
* | packet_router: use BRAM enables to perform pipelined readsJosh Blum2010-11-231-26/+21
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* | packet_router: use control register bit for master mode flagJosh Blum2010-11-231-2/+1
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* | packet_router: removed unused status words from readback muxJosh Blum2010-11-231-3/+3
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* | packet_router: swapped comm mux for a crossbar, serdes crossbar out now ↵Josh Blum2010-11-231-27/+62
| | | | | | | | muxed into the comm output
* | packet_router: used registered valid signal for BRAM read cycle delayJosh Blum2010-11-231-16/+15
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* | packet_router: created dsp framer for rx pathJosh Blum2010-11-231-6/+100
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* | packet_router: added lines for com crossbar and com output muxJosh Blum2010-11-231-13/+35
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* | packet_router: fixed swapped connection typo, dsp tx routing worksJosh Blum2010-11-231-2/+3
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* | packet_router: collapsed inspector states, fixed terminology for cpu inp vs outJosh Blum2010-11-231-163/+161
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* | packet_router: some tweaks, dsp output routing seems to work but has wrong ↵Josh Blum2010-11-231-4/+10
| | | | | | | | offset
* | packet_router: added all input/output signals to module, created the comm ↵Josh Blum2010-11-232-6/+22
| | | | | | | | muxes (in and out)
* | packet_router: created com signals (device IO lines that may be ethernet or ↵Josh Blum2010-11-231-79/+100
| | | | | | | | serdes)
* | packet_router: created inspector and added dsp output (however inspection ↵Josh Blum2010-11-232-4/+134
| | | | | | | | logic does not enable it yet)
* | packet_router: connected and created CPU read from interface (slow path in ↵Josh Blum2010-11-231-47/+153
| | | | | | | | place)
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