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* python: Change default name for rfnoc_image_coreWade Fife2020-08-102-9/+16
| | | | | | | | This changes the default name of the image core file to <DEVICE>_rfnoc_image_core.v instead of naming it after the YAML file. This ensures that when you use a custom YAML file, the resulting FPGA build will use the generated rfnoc_image_core and static_router files, rather than just the generated static_router file.
* devtest: Support multi_usrp_test on WindowsSteven Koo2020-08-101-1/+6
| | | | | | Windows requires the command 'python' to prepend calls to .py files. This change moves the path to multi_usrp_test.py to an argument on Windows.
* fpga: rfnoc: Add tests to FFT blockWade Fife2020-08-102-39/+202
| | | | | This adds additional tests to the testbench to cover register reads and basic IFFT functionaltiy.
* X300: Update frame sizes for 10GbEmichael-west2020-08-071-7/+5
| | | | | | | | | Setting default frame sizes for 10 GbE to match an Ethernet MTU of 9000, which is recommended in the UHD manual for the X300. The MTU detection code is left untouched, so it will automatically adjust if the MTU is lower than 9000. Signed-off-by: michael-west <michael.west@ettus.com>
* Python API: Add bindings for disconnect APIsmichael-west2020-08-071-0/+7
| | | | | | | Add Python bindings for recently added rfnoc_graph::disconnect() methods. Signed-off-by: michael-west <michael.west@ettus.com>
* RFNoC: Revert change in streamer initializationmichael-west2020-08-072-2/+2
| | | | | | | Reverting inadvertent change in num_chans argument during tx/rx_streamer_impl construction. Signed-off-by: michael-west <michael.west@ettus.com>
* mpm: n3xx: Remove eth1, eth2 from interface listMartin Braun2020-08-071-8/+0
| | | | | | | | | These interfaces are renamed to sfp0 and sfp1 and thus don't exist. They were kept in MPM for a while after the rename, but that was many versions of UHD ago, and the current filesystem (which does the rename) is not compatible with older versions of UHD anyway (and vice versa). These aliases are thus dead code and can be removed.
* mpmd: Clean out link_if_mgrMartin Braun2020-08-072-7/+4
| | | | | | | | | The link_if_mgr used to be a factory for Liberio, UDP, and DPDK. Now, Liberio is gone and DPDK is handled by UDP. This makes the class superfluous. Instead of removing the class, we comment on this, and remove any DPDK references from the file.
* mpm: Remove SID classMartin Braun2020-08-074-76/+2
| | | | | | This class is a remnant of UHD 3, and is no longer used anywhere. SID is no longer used at all in UHD, in fact, which means the class did not represent a valid data structure.
* rfnoc: Remove M_PI usage to fix Windows buildsSteven Koo2020-08-074-15/+13
| | | | | | M_PI may not exist if _USE_MATH_DEFINES isn't defined before the first include of math.h or cmath on Windows. This changes avoids the issue all together by defining our own PI.
* fpga: lib: add Intel MAX10 architecture for 2clk FIFOMax Köhler2020-08-062-28/+33
| | | | | | | | | | | | | This commit derives parameters for MAX10 devices if provided by the DEVICE parameter. MAX10 devices FIFO generator support up to 36 bit wide FIFOs using embedded memory (M9K) in simple dual port mode, which is treated equally to RAM in the parameters. In combination with sorting the ctrlport signals by usage, the used resources can be reduced on the MAX10 devices from 6 to 3 M9K blocks for a ctrlport_clk_cross instance without time and portids.
* fpga: lib: Update xport_svAndrew Moch2020-08-056-182/+437
| | | | | | | | | - Detect dropped words at the dispatch level. This prevents an overflow on CHDR from block CPU. - Dropped packets are recorded as CPU or CHDR drop count - Refactor to put chdr_xport_adapter.sv in different clock domain to improve timing - Unwrinkle tkeep/trailing transitions
* utils: Change template specialization namespacingBill Davis2020-08-051-8/+10
| | | | | There is a gcc bug for template specialization that causes compile errors. Reformatting the namespacing avoids the bug.
* tests: Add unit test for Keep One in N block controllerAaron Rossetto2020-08-052-0/+141
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* python: Add Keep One in N block controller bindingsAaron Rossetto2020-08-053-0/+34
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* rfnoc: Add Keep One in N block supportAaron Rossetto2020-08-055-0/+207
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* fpga: rfnoc: Add RFNoC Keep One in N blockAaron Rossetto2020-08-058-0/+1488
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* devtest: Update filter for e31x devicesSteven Koo2020-08-041-1/+1
| | | | Filter for e3x0 no longer matches e31x devices. Switch to e3xx.
* mpmd: Assume mgmt interface can route CHDR packetsSteven Koo2020-08-041-1/+15
| | | | | | | | | The e31x devices don't advertise CHDR interface availability when the low power FPGA is loaded. Since the e3xx and n3xx all route CHDR packets with Virtual NIC forwarding, it's safe to assume that if we can communicate with the mgmt_addr, we can communicate via CHDR too. We can then correctly set the reachability for the e31x from this assumption.
* X300: fix for incorrect PCIe buffer size valuesMatthew Crymble2020-08-043-5/+12
| | | | added extra args to get PCIe buffer sizes from factory method
* mpm: Reenable forward interfaces for remote hostsSteven Koo2020-08-041-2/+1
| | | | | The forward interfaces are able to forward CHDR packets with MPM iptables routing. This reenables forward interfaces as a CHDR option.
* x300: change default dboard clock rate from 50 to 100 MHzmattprost2020-08-045-42/+153
| | | | | | | | | | | | | | This sets the reference clock for X300 daughterboards (other than UBX) to 100 MHz by default to improve RF performance. Note: The UBX daughterboard requires a clock rate of no more than the max pfd frequency (50 or 25 MHz depending on the hardware rev) in order to maintain phase synchronization. If a UBX daughterboard is present on the X300, the clock rate for all daughterboards will be set to the pfd frequency by default. This is because of the limitation on X300 that requires the daughterboards to use the same clock rate. Signed-off-by: mattprost <matt.prost@ni.com>
* tests: Add graph disconnect/reconnect unit testmichael-west2020-08-041-0/+37
| | | | Signed-off-by: michael-west <michael.west@ettus.com>
* MPMD: Fix typomichael-west2020-08-041-1/+1
| | | | | | | Fix typo in warning message when DPDK is specified at run time but not enabled at compile time. Signed-off-by: michael-west <michael.west@ettus.com>
* RFNoC: Demote MTU message in radio controlmichael-west2020-08-041-1/+1
| | | | | | Change message from warning to debug when spp is greater than MTU. Signed-off-by: michael-west <michael.west@ettus.com>
* multi_usrp: Fix connect/disconnect of RFNoC chainsmichael-west2020-08-041-80/+202
| | | | | | | | | - Added helper methods to connect and disconnect TX and RX chains. - Directly create streamer objects and register local disconnect methods to make sure chains are disconnected and the streamer is removed from the graph when streamers are destroyed. Signed-off-by: michael-west <michael.west@ettus.com>
* RFNoC: Added support for destruction of streamersmichael-west2020-08-044-8/+52
| | | | | | | | | | | - Added rfnoc_graph method to disconnect a connection. - Added rfnoc_graph method to disconnect a streamer. - Added rfnoc_graph method to disconnect a port on a streamer. - Added disconnect callback to rfnoc_rx_streamer and rfnoc_tx_streamer. - Registered disconnect callback functions to streamers returned by get_rx_streamer and get_tx_streamer methods. Signed-off-by: michael-west <michael.west@ettus.com>
* RFNoC: Add disconnect methods to graphmichael-west2020-08-044-101/+364
| | | | | | | | | | - Added method to disconnect an edge - Added method to remove a node - Fixed algorithm to check edges during connect. Previous code was checking some edges twice and allowing duplicate edges to be created for existing edges. Signed-off-by: michael-west <michael.west@ettus.com>
* RFNoC: Add xport disconnect callbacksmichael-west2020-08-0410-43/+122
| | | | | | | | | | | | Transports were not disconnecting their links from the I/O service upon destruction, leaving behind inaccessible send and recv links used by nothing. This led to I/O errors after creating several transports. Added callbacks to transports to automatically disconnect their links from the I/O service when the transport is destroyed. Updated all callers to supply a disconnect callback. Signed-off-by: michael-west <michael.west@ettus.com>
* python: Add replay RFNoC block controller bindingsmattprost2020-08-043-0/+45
| | | | Signed-off-by: mattprost <matt.prost@ni.com>
* tests: Add Replay Block controller unit testmattprost2020-08-042-0/+764
| | | | Signed-off-by: mattprost <matt.prost@ni.com>
* rfnoc: Add RFNoC replay blockmattprost2020-08-045-202/+855
| | | | Signed-off-by: mattprost <matt.prost@ni.com>
* fpga: rfnoc: Add RFNoC Replay blockWade Fife2020-08-0412-875/+4164
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* fpga: rfnoc: Add 4 KiB boundary check to sim_axi_ramWade Fife2020-08-041-0/+12
| | | | | Adding a check for bursts that cross the 4 KiB boundary to the AXI4 memory model. Crossing a 4 KiB boundary is not allowed by AXI4.
* fpga: rfnoc: Add support for CHDR_W < ITEM_W*NIPCWade Fife2020-08-042-137/+195
| | | | | | | | | This change fixes the case where CHDR_W < ITEM_W*NIPC. It also adds a state machine to stall the input to the pyld_fifo to ensure that the pkt_info_fifo will not overflow. Previously in some cases it allowed the same word to be inserted into the pyld_fifo multiple times.
* fpga: lib: Fix comments and indentation in axi_fifo_short.vWade Fife2020-08-041-98/+87
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* python: Fix pyuhd to include subpackagesSamuel O'Brien2020-08-041-2/+6
| | | | | | | | | | | | | | | | | Originally, the setup.py file for pyuhd listed only one package packages=['uhd'] the setuptools docs: https://setuptools.readthedocs.io/en/latest/setuptools.html#using-find-packages specify that this should also include subpackages, i.e uhd.dsp, uhd.usrp, etc. Currently, when packaging libpyuhd, we are not including the subpackages, and then when you run `import uhd`, it fails because uhd.usrp and uhd.dsp don't exist. This commit alleviates this issue by using setuptools.find_packages like the docs recommend. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* cmake: don't try to determine runtime python version when cross compilingJoerg Hofrichter2020-08-041-9/+22
| | | | | | When cross compiling, the architecture of the runtime python interpreter does not match the host architecture. Therefore, don't try to detect it and set it to the min. supported python version instead.
* mpm: cmake: use UHDPython module to find PythonJoerg Hofrichter2020-08-041-10/+5
| | | | | Use UHDPython module (from UHD) to find Python interpreter, libraries and include directories.
* cmake: find python in sysroot path firstJoerg Hofrichter2020-08-041-0/+8
| | | | | | Set CMP0094 policy to NEW to make sure Python3 is first found in the SDK's sysroot if both the sysroot and the native paths are included in the PATH variable.
* cmake: tests: Support qemu also for python based testsJoerg Hofrichter2020-08-042-35/+71
| | | | This requires python3 to be installed in the target sysroot
* rfnoc: Fix compilation error when tracing enabledAaron Rossetto2020-07-311-2/+2
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* example: Check for failure in tx_samples_from_fileSamuel O'Brien2020-07-311-3/+9
| | | | | | | | | | | I was using this example for testing with the simulator. If there is a flow control failure, the original example would just silently finish, outputing the message "Done!" (Not even printing a timeout message). This commit asserts that the number of samples sent is equal to the number of samples provided. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* fpga: n320: Add BIST (AA) image filessteviez2020-07-315-0/+1148
| | | | | | | | | | This adds new image files which come with a DRAM FIFO. The addition of an N320 image with a DRAM FIFO allows DDR3 BIST to be run on an assembled (motherboard + daughterboard) N320. This image is intentionally very similar to the N300_AA and N310_AA targets which serve the same purpose of providing an image with a DRAM FIFO for their respective devices.
* utils: Use absolute paths in image builder build()steviez2020-07-311-2/+2
| | | | | | | A segment of the build() function updates the working directory. This change converts several paths to absolute paths to avoid having a relative path (such as one containing up-level references) deviate from its' intended meaning after the directory change.
* mpm: n3xx: bist: Read mboard and dboard eeprom to determine productSteve Czabaniuk2020-07-312-5/+14
| | | | | | | | The routine to identify products currently only reads the motherboard EEPROM. The N310 and N320/N321 use the same motherboard so these devices can't be distinguished using the motherboard EEPROM alone. This change makes get_product_id() read both the motherboard and daughterboard EEPROM in order to determine which N3xx it actually is.
* fpga: lib: Add xge features for new xport_svAndrew Moch2020-07-311-100/+191
| | | | | | | | | | - Made some things optional to reduce logic when used with the new xport_sv: (1) Clocking to sys_clk (2) Preamble insertion - New options to CUTTHROUGH faster on the TX path. The new xport_sv already has a gate to accumulate at its clock crossing.
* fpga: sim: Update PkgEthernetAndrew Moch2020-07-311-57/+91
| | | | | | Consolidated calcuation of last_tkeep and tkeep_last. Changed error checking to support unwrinkling tkeep/trailing changes in 100G etherent and support for testing packet dropping on backup.
* fpga: sim: Fix AxiLiteBfmAndrew Moch2020-07-311-3/+3
| | | | | AxiLiteBfm incorrectly included stb argument on rd() and printed actual response instead of expected in debug message.
* fpga: lib: Update AxiLiteIfAndrew Moch2020-07-311-1/+74
| | | | | This fixes a bug on wrstb in AxiLiteIf and adds a new AxiLiteIf_v that can be used to stitch onto Verilog port_maps.
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