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* mpm: Fix floating-point errors in MCR configurationMartin Braun2017-12-223-83/+114
* n3xx: enable DRP access to DB MGTS & QPLLsdjepson12017-12-222-36/+249
* mpm: bfrfs: Assert reference buffer is a byte stringMartin Braun2017-12-221-0/+1
* types: Change eeprom_map_to to uint8_t vectorsMartin Braun2017-12-222-3/+6
* mg: Add LO specific properties and methodsTrung N Tran2017-12-224-57/+515
* mpm: Enable TX external LO set through args, simplify codeTrung N Tran2017-12-227-71/+93
* n3xx: fix TX power lossTrung N Tran2017-12-221-0/+1
* tdc: fix bug in pps capture reportingDaniel Jepson2017-12-222-8/+19
* mpm: add all time_source options and complete MB clk controlDaniel Jepson2017-12-221-10/+96
* mpm: added uio for motherboard regssugandhagupta2017-12-221-7/+47
* mpm: Factor out xport managers as own objectsMartin Braun2017-12-229-233/+328
* mg: Update gain immediately after setting frequencyTrung N Tran2017-12-222-5/+37
* mg: Lock access to settersMartin Braun2017-12-222-0/+16
* mpm: utils: Add string conversion utilitiesMartin Braun2017-12-221-0/+42
* mpm: close unused pyroute objectsTrung N Tran2017-12-221-33/+39
* mpm: Return correct value for usrp_hwd.py --init-onlyMartin Braun2017-12-221-1/+1
* mg: Fix gain setting on channels 1 and 3Trung Tran2017-12-224-36/+46
* mpm: Fix python2 vs python3 zlib.crc32 output differenceSteven Bingler2017-12-221-1/+1
* mg: fix rx gain on channel 1Trung N Tran2017-12-221-1/+2
* mpm: n310: Compile .dts files to .dtbo on updateMartin Braun2017-12-221-7/+31
* mpm: mg: Refactor init(), limit object scopesMartin Braun2017-12-221-39/+53
* mg: Fix TX power issuesTrung N Tran2017-12-222-3/+5
* mpmd: More gracefully quite the reclaim loop on failureMartin Braun2017-12-221-1/+6
* mpm: Add temporary failure for FPGA reloadMartin Braun2017-12-221-0/+9
* mpm: Reset periph manager on updateBrent Stapleton2017-12-224-15/+105
* mpm: adding destructor for UIOBrent Stapleton2017-12-221-0/+11
* mpm: PeriphManager decides and applies overlayBrent Stapleton2017-12-225-57/+14
* fpga load: Components file paths in component dictBrent Stapleton2017-12-221-9/+12
* fpga load: Atomic updating of multiple componentsBrent Stapleton2017-12-225-97/+155
* mg: fix TX dsa bugTrung N Tran2017-12-221-1/+3
* mpm: mg: Add ref lock sensorMartin Braun2017-12-221-0/+15
* mpm: lmk04828: Fix docstringMartin Braun2017-12-221-2/+2
* legacy_compat: extend radio index and radio slotTrung N Tran2017-12-221-2/+28
* mpm: mg: Add flag to see if master clock rate is being changedMartin Braun2017-12-221-10/+26
* mpm: mg: Fix linter errors, compacted SPI factoriesMartin Braun2017-12-221-27/+16
* mpm: mg: Move some class attributes to local scopesMartin Braun2017-12-222-32/+38
* mpm: n310: Remove unused imports (linter warnings)Martin Braun2017-12-221-2/+1
* mpm: mykonos: Increase SPI speed to 20 MHzTrung N Tran2017-12-221-1/+1
* mpm: mg: Remove unused spi_factories keyTrung N Tran2017-12-221-5/+3
* mpm: mg: Set default master_clock_rate to 125 MHz at every initTrung Tran2017-12-221-0/+2
* mpm: mykonos: Add API to change master clock rateTrung N Tran2017-12-228-10/+135
* mpmd: Bump init timeout to 120 seconds (sic)Martin Braun2017-12-221-1/+1
* jesd: add reset routine and make portions more generic for various linksdjepson12017-12-221-33/+101
* n3xx: add support for 122.88 and 153.6 MHz sample clock ratesMartin Braun2017-12-225-91/+207
* mg: Enable variable master clock ratesMartin Braun2017-12-225-11/+56
* mg: Init dboard sensors via MPMMartin Braun2017-12-223-9/+39
* mpm: mg: Add dboard sensors for low- and highband LO lock statusMartin Braun2017-12-223-16/+52
* mpm: ad937x: Add LO lock APIMartin Braun2017-12-222-0/+21
* mpm: Let usrp_hwd.py --init-only show init status and durationMartin Braun2017-12-221-1/+10
* mpm: mg: Optionally parallelize init calls to dboardMartin Braun2017-12-221-3/+19
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