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* fpga: lib: Add interface and model for AXI4-LiteAndrew Moch2020-06-246-1/+1099
| | | | | | | | | | | | | | | | | (1) Synthesizable AxiLiteIf (2) Simulation model for AxiLite contains an AxiLiteTransaction class and an AxiLiteBfm class. Important Methods a. wr - performs non-blocking write and checks for expected response b. wr_block - performs a blocking write and provides response c. rd - performs a non-blocking read and checks for expected response d. rd_block - persforms a blocking read and provides response The model allows parallel execution of reads and writes, but enforces rd and write ordering when using the above methods. When transactions are posted directly, ordering is not guaranteed, and reads and writes are put on the interface immediately.
* fpga: lib: Pipeline and add clken to ip_hdr_checksumAndrew Moch2020-06-244-66/+51
| | | | | | | Adds LATENCY parameter to control the ammount of pieplineing. Adds a clock enable to control the advance of the pipeline. Used in xport when calculating new UDP headers for CHDR traffic.
* test: Add verify-flatbuffer testLars Amsel2020-06-232-0/+34
| | | | | | This runs update_fbs.py --verify as a unit test, and fail accordingly. The test passes if git executable is not found or the schema files are not within a git repo, because both are not a dependency of UHD.
* test: Use git hashes to verify flatbuffers schemaLars Amsel2020-06-231-55/+78
| | | | | | | | | | | | Each version of flatbuffers (might) generate different header files for the same schema file. Therefore we cannot compare the content of the generated headers to detect changes in the schema that are not accompanied by a change in the generated header. To have at least a minimal check that the schema matches the generated header we compare the git hashes of both. We will not allow to change the schema without changing the header and vice versa. This condition is checked by a unit test.
* cal: change default extension of calibration filesLars Amsel2020-06-235-16/+30
| | | | | | | | | Flatbuffers offers an option to set the default extension for binary files. Our calibration files have the extension .cal. Set the extension in all schema files to ease conversion between binary and text representation of calibration files. Updated documentation accordingly.
* mpmd: Increase default long timeout to 30 secondsSteve Czabaniuk2020-06-221-2/+2
| | | | | Note: timeouts were occurring on n310 due to an increase in daughterboard re-initialization time.
* utils: update_fbs.py: Minor refactor, fix path bugMartin Braun2020-06-221-9/+15
| | | | | | | - The UHD auto-detection was broken. Now it can find UHD in the same directory. - The main() function was split into main() and run(), which would allow loading this module and calling run() as it's own function.
* utils: Make uhd_images_downloader raise warning for invalid pathsSteve Czabaniuk2020-06-221-11/+21
| | | | | This makes the utility warn the user when they pass a path argument that is invalid; the utility falls back to defaults if this occurs.
* multi_usrp: Assert that edge_lists are non-empty before accessingSteve Czabaniuk2020-06-221-0/+2
| | | | | The edge_list for a given rx/tx chain should never be empty so this explicitly performs that check, which prevents a potential bad access.
* fpga: tools: Fix ModelSim return statusWade Fife2020-06-182-5/+12
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* rfnoc: Update port format in block YAMLWade Fife2020-06-189-22/+22
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* rfnoc: Add makefile_srcs to block YAMLWade Fife2020-06-185-0/+5
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* utils: Support expressions for num_ports in block defsAaron Rossetto2020-06-181-2/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit allows the RFNoC image builder utility to support block definition .yml files where the num_ports values are numerical expressions using values sourced from the parameters section when the block is used in an RFNoC image. An example of such an expression for num_ports is the split stream block, where the number of output ports is defined as the product of the NUM_PORTS and NUM_BRANCHES parameters: data: fpga_iface: axis_chdr clk_domain: rfnoc_chdr inputs: in: num_ports: NUM_PORTS outputs: out: num_ports: NUM_PORTS*NUM_BRANCHES In an RFNoC image definition .yml file, these parameters can be specified when a split stream block is instantiated in an image: split0: block_desc: 'split_stream.yml' parameters: NUM_PORTS: 2 NUM_BRANCHES: 3 Thus, the split0 instance of the split stream block is configured with 2 input ports and 6 output ports (2*3 from NUM_PORTS*NUM_BRANCHES). When the RFNoC image builder runs and encounters a block instantiation where that block has a non-integer string in the num_ports key of its block definition, it performs a textual replacement of the identifiers in the string with the corresponding values from the parameters section of the block's instantiation. If no such parameter corresponding to the identifier exists, the block definition file's parameters section is consulted for a default value for the parameter. If no such parameter can be found in either of these locations, the identifier is left unchanged in place. After the text substitution step, the expression is evaluated using Python's expression evaluator. The expression should evaluate to an integer value, which is then used as the num_ports value. If the expression does not evaluate to an integer, or fails to evaluate, an error will be reported.
* fpga: rfnoc: Add support for 512-bit CHDR widthsAndrew Moch2020-06-1820-389/+572
| | | | | | | | This fixes the rfnoc_null_src_sink, chdr_crossbar_nxn, and chdr_stream_endpoint blocks so that wider CHDR widths are properly supported. It also updates PkgChdrBfm to able to properly test these blocks. The testbenches have been updated to test both 64 and 512-bit widths.
* python: Add FFT RFNoC block controller bindingsAaron Rossetto2020-06-183-0/+49
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* tests: Add unit test for FFT RFNoC blockAaron Rossetto2020-06-182-0/+191
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* rfnoc: Augment FFT RFNoC block controllerAaron Rossetto2020-06-183-56/+250
| | | | | | | This commit augments the existing FFT RFNoC block controller with C++ functions through which the block can be configured, as well as adding range checking to the various properties that sit atop the FFT RFNoC block registers.
* cal: Add automated port switchLars Amsel2020-06-174-20/+150
| | | | | | | | | | | | | | | | | Current implementation needed manual interaction to calibrate each antenna. More sophisticated setups are able to switch between channels and antennas programmatically. This commit introduces a base class that handle the switch behaviour. The previous implementation moved to a ManualSwitch class which is the default switch. Without any options the previous flow remains unchanged. A new class is able to handle NI switch models. The switch port can be given via options parameter (comA is default). The channels are connected in ascending order. The user has to ensure that the cable setup matches the order given for channels and antennas. Co-authored-by: Martin Braun <martin.braun@ettus.com>
* cmake: Fix warning finding libusbMartin Braun2020-06-172-3/+3
| | | | | | | | | | UHD has a custom file to find libusb. This fixes a warning coming from that file caused by the fact that we're looking for a package called LIBUSB, but the file was called FindUSB1 (i.e., we're expecting a package name of USB1). Common CMake calls were also moved to lowercase for CMake coding guidelines consistency.
* fpga: lib: add extended spi core for 64bitMax Köhler2020-06-172-0/+287
| | | | | | | | | The existing SPI core (simple_spi_slave.v) was limited to 32 bit. This commit adds a second spi core with capability to transfer up to 64 bits while keeping the same amount of resources when using generic setting MAX_BITS = 32. Furthermore, the new module aligns mosi and miso with the edges of sclk. The register stages were not aligned in the existing version.
* fpga: tools: remove temporary Xilinx directories for BD recreationMax Köhler2020-06-151-10/+13
| | | | | | | During recreation of block diagrams any RTL modules will be kept in hidden directories within the build directory. Updates of the RTL sources might not be taken into account. Solution is to remove Xilinx's hidden project directories before calling vivado.
* cal: Add switch documentationLars Amsel2020-06-151-2/+24
| | | | | | | | | Add chapter to explain usage of supported switch classes which handle connection of DUT and measurement devices. Documentation is done for ManualSwitch (default) and NI switch for devices that can be used by the niswitch Python package. Co-authored-by: Martin Braun <martin.braun@ettus.com>
* tests: Add infrastructure to run Python unit testsMartin Braun2020-06-153-0/+49
| | | | | | | | | | | | | | | | - Add UHD_ADD_PYTEST() CMake macro - Add CMake code to tests/CMakeLists.txt to auto-run all registered Python unit tests - Add a token unit test (it replicates parts of ranges_test.cpp) The way Python-based unit tests are implemented in UHD is that they can import uhd, and then operate on the module as usual. Writing unit tests in Python instead of C++ can have multiple advantages: - If they test PyBind-wrapped C++ code, they can test both the binding and the underlying C++ code at once - Writing unit tests in Python may be more concise
* python: radio_control: Explicitly import ALL_CHANS into Python bindingsMartin Braun2020-06-151-1/+4
| | | | | This avoids a dynamic linker error by copying the ALL_CHANS value into the the Python bindings before using it.
* fpga: Update RFNOC_EDGE_TBL_FILE for CygwinWade Fife2020-06-124-4/+4
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* mpm: Look for pca953x based devices by device/nameSteven Koo2020-06-113-4/+4
| | | | | | | | | | The pca953x driver introduced a change for how the "label" property populates. Instead of using the device model, it gives a device specific name. As a replacement, use device/name. This affects the tca6424 and tca6408. For the kernel change that causes this see: https://github.com/torvalds/linux/commit/5128f8d4450159f59565d247437d3bedda3994cb
* uhd: cal: Fix function binding in Python cal data container classLars Amsel2020-06-111-1/+1
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* fpga: tools: Allow multiple top modules with ModelSimWade Fife2020-06-111-1/+1
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* examples: Fix usrp_power_meter exampleLars Amsel2020-06-111-16/+23
| | | | | | This PR applies antenna channel settings before available calibration data, and moves initialization code to setup_device, returning necessary settings in a tuple.
* devtest: Assert result of python_api_test correctlyMartin Braun2020-06-101-0/+15
| | | | Before this, the python_api_test didn't assert an error when it failed.
* devtest: Don't skip Python API tests if Python API is enabledMartin Braun2020-06-101-0/+5
| | | | | | | | One of the devtests (the python_api_test) gets skipped without failures if the uhd module can't be loaded. However, this can mask errors if the uhd module can't be loaded because it's broken. This change will verify if the uhd module should have been loaded, and throw an error if that's the case.
* b200: tests: Fix PyLint issues in B200 devtestMartin Braun2020-06-101-1/+4
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* tests: Fix multi_usrp_testMartin Braun2020-06-101-16/+28
| | | | | | | | This is a test that automatically executes API calls. The following tests were broken: - clock source: On B200mini, we need to set the time source back to internal to test the clock source. - The filter API call tests did not match the API calls themselves
* filter API: Fix Python bindings and multi_usrp callsMartin Braun2020-06-102-6/+5
| | | | | | | | | | | This fixes the following issues: - The Python bindings did not declare parents for the various filter object classes properly. This meant that set_?x_filter wouldn't work, because the user would pass a specific type (e.g., analog_filter_lp), but the class would not recognize it as a filter_info_base. - In multi_usrp.cpp, filter names are also property tree paths to make them unique. However, the setters and getters for filters would then prepend the FE path again, thus breaking those calls.
* multi_usrp: Various multi_usrp_rfnoc fixesmichael-west2020-06-101-134/+158
| | | | | | | | | | | | | - Fix serial and PID info in get_usrp_xx_info methods - Make defaults match multi_usrp base class - Make support of ALL_MBOARDS and ALL_CHANS consistent across all set methods - Make set/clear_time_commands honor the mboard argument - Fix get_rx_lo_sources() to use rx_chain.block_chan - Fix typos in get_tx_freq_range that were calling rx functions instead of tx Signed-off-by: michael-west <michael.west@ettus.com>
* X300: Fix get_time_source()michael-west2020-06-101-0/+2
| | | | | | Store time source in set_time_source() call. Signed-off-by: michael-west <michael.west@ettus.com>
* MPMD: Fix RPC call to get GPIO sourcemichael-west2020-06-101-1/+1
| | | | Signed-off-by: michael-west <michael.west@ettus.com>
* cal: Add support for NI ModInst measurement devicesLars Amsel2020-06-102-0/+455
| | | | | | | | | | | | | | | | | | | | | | Power measurements for TX calibration can be done using NI-RFSA devices and the RFmx SpecAn library. Use "rfsa" as meas_device option for this. The implementation mimics the behaviour of the "RFMXSpecAn TXP (Basic)" example. Signal generation for RX calibration can be done using NI-RFSG devices. Use "rfsg" as meas_device option for this. The implementation mimics the behaviour of the "RFSG Frequency Sweep" example. The device can be selected by passing its name in the option string. This is only necessary if more than one device of the same family is installed in the system. The support is limited to Windows operating System. Drivers for RFSA and RFSG must be installed as well as the RFmx SpecAn library. The "nimodinst" Python package must be installed to be able to detect the devices. The implementation uses ctypes to call into the C-API of the device drivers. Only the bare minimum to fulfill the calibration requirements is implemented.
* x300: Enable power reference APIMartin Braun2020-06-103-2/+100
| | | | | | | | | This enables the power calbration API for X300 and X310. The uhd_power_cal.py script will be able to create calibration files for X300 series USRPs. The multi_usrp calls *_power_reference will be functional, assuming there is calibration data available for the given system.
* radio_control: Provide default implementations for ref power APIsMartin Braun2020-06-102-22/+47
| | | | | | | | The various implementations for the reference power APIs are always the same, assuming the existence of a pwr_cal_mgr object. We therefore store references to power cal managers in radio_control_impl, which radios can choose to populate. The APIs then don't have to be reimplemented in the various radio classes, unless they want to for whatever reason.
* python: Add __repr__, property bindings to NocBlockBaseAaron Rossetto2020-06-091-5/+17
| | | | | | | | | | | | | | | | | | | | | This commit adds a __repr__ function to the noc_block_base bindings, which helpfully displays the block's unique ID, e.g.: >>> block = g.get_block('0/VectorIIR#0') >>> block <NocBlock for block ID '0/VectorIIR#0'> Also added are get_property_ids and set_properties functions, so Python clients can set block properties by string if desired, e.g.: >>> block.get_property_ids() ['alpha', 'beta', 'delay', 'max_delay'] >>> block.set_properties('alpha=0.45,beta=0.77,delay=41') >>> viir = uhd.rfnoc.VectorIirBlockControl(block) >>> viir.get_alpha(0) 0.45 >>> viir.get_beta(0) 0.77
* python: Add null RFNoC block controller bindingsAaron Rossetto2020-06-093-0/+30
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* python: Add vector IIR RFNoC block controller bindingsAaron Rossetto2020-06-094-1/+30
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* python: Add radio RFNoC block controller bindingsAaron Rossetto2020-06-095-2/+175
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* python: Add FIR filter RFNoC block controller bindingsAaron Rossetto2020-06-093-0/+26
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* python: Add Fosphor RFNoC block controller bindingsAaron Rossetto2020-06-093-0/+69
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* python: Add DUC RFNoC block controller bindingsAaron Rossetto2020-06-093-0/+34
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* python: Add DDC RFNoC block controller bindingsAaron Rossetto2020-06-093-0/+36
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* python: Add block controller factory utilityAaron Rossetto2020-06-091-0/+30
| | | | | | | | | | | | | | | This commit adds a utility class for use with the Python RFNoC block controller PyBind bindings which facilitates constructing instances of a specific block controller type from its noc_block_base base class. This allows Python code to create and configure specific block controller instances by calling get_block on a uhd.rfnoc.RfnocGraph object with the block ID of the block in question and then passing the result into the constructor method of the block controller, e.g.: graph = uhd.rfnoc.RfnocGraph("addr=...") block = graph.get_block(uhd.rfnoc.BlockID("0/DDC#0")) ddc = uhd.rfnoc.DdcBlockControl(block) ddc.set_input_rate(10e6, 0)
* mpm: Return filesystem info from get_device_infoLane Kolbly2020-06-051-0/+14
| | | | | This commit returns information on the filesystem and mender artifact versions to clients of the MPM RPC connection.
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