| Commit message (Expand) | Author | Age | Files | Lines |
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| ... | |
| * | | usrp: fix wildcard set for time/clock source | Josh Blum | 2012-03-12 | 1 | -2/+2 |
| * | | uhd: added fullscale option stream arg | Josh Blum | 2012-03-11 | 3 | -1/+10 |
| * | | Make DBSRX* set default bandwidth based on codec rate | Jason Abele | 2012-03-11 | 2 | -2/+7 |
| * | | Fix RSSI measurement | Jason Abele | 2012-03-11 | 3 | -19/+4 |
| * | | Merge branch 'fpga_master' | Josh Blum | 2012-03-11 | 4 | -101/+3 |
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| | * | fpga: fix custom defs in some top level makefiles | Josh Blum | 2012-03-08 | 4 | -101/+3 |
| * | | usrp1: fix for cordic init, cant do it that way on tx | Josh Blum | 2012-02-29 | 1 | -3/+0 |
| * | | Changes Windows installer filename to match naming convention of Ubuntu and F... | Nicholas Corgan | 2012-02-29 | 1 | -0/+1 |
| * | | uhd: fix sc16 to sc8 conversion table | Josh Blum | 2012-02-29 | 1 | -12/+12 |
| * | | usrp2: device locking tweaks | Josh Blum | 2012-02-29 | 1 | -9/+6 |
| * | | Changing UHD to 'USRP HD' in one last place. | Ben Hilburn | 2012-02-28 | 1 | -1/+1 |
| * | | usrp: reset cordics on init after tick rate update | Josh Blum | 2012-02-28 | 4 | -0/+33 |
| * | | Changes images CMakeLists.txt to be consistent with new UHD version naming sy... | Nicholas Corgan | 2012-02-28 | 1 | -6/+5 |
| * | | uhd: fixed some compile warnings for msvc | Josh Blum | 2012-02-28 | 4 | -5/+5 |
| * | | cmake: | Nicholas Corgan | 2012-02-28 | 4 | -14/+17 |
| * | | uhd: fixed send pkt handler, vrt packet type was uninitialized | Josh Blum | 2012-02-27 | 1 | -0/+1 |
| * | | usrp2: removed unused memory map entries | Josh Blum | 2012-02-27 | 1 | -5/+1 |
| * | | usrp1: fix to use the db connection type to determine DAC sign | Josh Blum | 2012-02-24 | 1 | -2/+10 |
| * | | usrp1: fix advertised samples per packet in send streamer | Josh Blum | 2012-02-21 | 1 | -1/+2 |
| * | | Try really hard to get cmake to use compiler flags from the toolchain file. | Philip Balister | 2012-02-21 | 1 | -2/+2 |
| * | | usb: added /opt/local to libusb search path | Josh Blum | 2012-02-21 | 1 | -1/+2 |
| * | | usrp2: some tweaks to the device locking logic | Josh Blum | 2012-02-20 | 1 | -6/+9 |
| * | | usrp2: added retry logic to control packets | Josh Blum | 2012-02-20 | 1 | -2/+32 |
| * | | usrp2: changed download url for dd.exe | Josh Blum | 2012-02-18 | 2 | -2/+2 |
| * | | Merge branch 'fpga_master' | Josh Blum | 2012-02-18 | 3 | -4/+26 |
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| | * | usrp2/nseries: added churn to meet timing | Josh Blum | 2012-02-18 | 2 | -2/+4 |
| | * | vita rx: trigger clear after packet tranfer | Josh Blum | 2012-02-18 | 1 | -2/+22 |
| * | | uhd: added -fvisibility-inlines-hidden | Josh Blum | 2012-02-18 | 1 | -1/+2 |
| * | | Merge branch 'next' | Josh Blum | 2012-02-17 | 123 | -1729/+3954 |
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| | * | | Merge branch 'fpga_next' into next | Josh Blum | 2012-02-17 | 54 | -1070/+2565 |
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| | | * | dsp rework: fix dspengine_8to16 to handle padded packets | Josh Blum | 2012-02-17 | 1 | -4/+3 |
| | | * | dsp_engine: fix for upper/lower swap, and odd length packets | Matt Ettus | 2012-02-16 | 1 | -16/+20 |
| | | * | dsp rework: added flusher to vita tx chain on clear | Josh Blum | 2012-02-15 | 1 | -8/+16 |
| | | * | dsp rework: minor simplification in vita_tx_deframer | Josh Blum | 2012-02-13 | 1 | -4/+1 |
| | | * | dsp rework: full-rate pipelining in vita tx deframer | Josh Blum | 2012-02-12 | 1 | -37/+51 |
| | | * | dsp rework: pass enables into glue, update power trig, parameterize, fix modu... | Josh Blum | 2012-02-10 | 9 | -103/+145 |
| | | * | dsp rework: implement 64 bit ticks no seconds | Josh Blum | 2012-02-06 | 10 | -111/+57 |
| | | * | B100: External FPGA reset from FX2 reuses fpga_cfg_cclk. | Nick Foster | 2012-02-06 | 2 | -2/+6 |
| | | * | dsp rework: pass vita clears into dsp modules, unified fifo clears | Josh Blum | 2012-02-04 | 14 | -81/+76 |
| | | * | b100: timing constraints on GPIF lines | Josh Blum | 2012-02-04 | 1 | -0/+9 |
| | | * | b100: connect all clears for gpif | Josh Blum | 2012-02-03 | 3 | -15/+8 |
| | | * | power_trig: test code for power trigger | Matt Ettus | 2012-02-02 | 1 | -0/+71 |
| | | * | dsp rework: rehash of the custom module stuff and readme | Josh Blum | 2012-02-02 | 26 | -262/+544 |
| | | * | power_trig: first cut at power trigger with fixed delay | Matt Ettus | 2012-02-02 | 2 | -2/+115 |
| | | * | dsp_rework: testbench enhancements | Matt Ettus | 2012-02-02 | 1 | -11/+34 |
| | | * | dsp rework: custom engine module for rx/tx vita chain | Josh Blum | 2012-02-01 | 13 | -138/+294 |
| | | * | dsp rework: register the sample in vita tx ctrl | Josh Blum | 2012-02-01 | 1 | -2/+11 |
| | | * | Merge branch 'slave_fifo_rebase' into dsp_rework | Josh Blum | 2012-02-01 | 6 | -35/+509 |
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| | | | * | Fix missing B100 core_compile (poor Git hygeine) | Nick Foster | 2012-01-23 | 1 | -0/+1 |
| | | | * | b100: bumped fpga compat number for slave fifo mode | Josh Blum | 2012-01-12 | 1 | -1/+1 |
