aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* tests: updated devtest runner to use standard device argsMatthew Crymble2020-05-273-4/+4
| | | | | This will allow run_testsuite.py to be called for specific devices instead of all devices for a certain type.
* mpm: Return build info in mpm_sw_versionLane Kolbly2020-05-271-1/+1
| | | | | The mpm_version key was being overridden by the MPM_COMPAT field in rpc_server::get_device_info.
* utils: Let uhd_images_downloader also use HTTPS proxiesMartin Braun2020-05-271-3/+4
| | | | | | This complements b721621. In that commit, we directly go to HTTPS, but in either case (direct or indirect) the --http-proxy command line argument did not use the proxy for https.
* fpga: tools: Improve native ModelSim supportWade Fife2020-05-263-72/+255
| | | | | This adds support for colored output and support for directories added to the list of source files (for HLS support).
* fpga: tools: Add contents of directories for HDL sourceWade Fife2020-05-263-5/+26
| | | | | | | | For HLS builds, the output file names aren't known in advance. This makes it difficult to write the Makefile to pull in the files and pass them to the build tools. This change allows you to add a directory as your HDL source so that all files in the directory will be pulled in by the build process.
* host/examples/ascii_art_dft.hpp: fix and modernize example mainEtienne Wodey2020-05-261-1/+6
| | | | | | | Refresh screen after printing the DFT data. Use C++14 std::this_thread::sleep_for to control the refresh rate. Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
* cal: Minor fixes in power container, add unit testMartin Braun2020-05-263-3/+27
| | | | | | | - min_power and max_power arguments were swapped. They were always called correctly, so this is more of a documentation fix. - Add a unit test for the case where power values are not regular, which is the normal case with real data.
* multi_usrp: Amend get_usrp_{rx,tx}_info() to include cal keysMartin Braun2020-05-202-0/+28
| | | | | | This adds two more keys to the dictionary return from get_usrp_{rx,tx}_info() which can be used to query the calibration key and serial.
* rfnoc: radio: Add APIs to query cal keysMartin Braun2020-05-203-0/+53
| | | | | | | | This allows asking the radio for the keys it uses to read/write its calibration data. By querying radio_control::get_{rx,tx}_power_ref_keys(), the return values can be used to access uhd::usrp::cal::database::read_cal_data().
* tests: Add unit tests for pwr_cal_mgrMartin Braun2020-05-202-0/+157
|
* fixup! lib: Add power cal managerMartin Braun2020-05-201-1/+2
| | | | | | - The tracking mode was not set to power when calling set_power() - The data consistency check had an inverted logic, thus always printing a warning
* docs: Fix some Doxygen warningsMartin Braun2020-05-201-2/+2
| | | | | Disables CLANG_ASSISTED_PARSING and CLANG_OPTIONS, which are not available in all Doxygen version, and are unused.
* docs: build: Improve build and git instructionsMartin Braun2020-05-201-15/+16
| | | | | | - Change the git URL to https (from git protocol) - Remove references to fpga-src - Update branch information (removed references to maint)
* docs: x300: Fix fpga pathMartin Braun2020-05-201-1/+1
| | | | | When the FPGA repo was merged back into the UHD repository, this line was forgotten.
* utils: Fix FPGA search in rfnoc_image_builder from fpga-src to fpgaMartin Braun2020-05-201-1/+1
| | | | | When the FPGA repository was merged back into the UHD repository, this line was forgotten.
* cal: database: Add option to register flash cal callbacksMartin Braun2020-05-203-4/+110
| | | | | | | | | | | This adds the possibility to read cal data from flash/EEPROM by adding callbacks to the database. Unlike the RC and FILESYSTEM data, this is very device-specific, but we can let devices register callbacks in the database so that reading cal data from flash can use the same APIs as from RC or filesystem. Note that this also gives a convenient way to inject call data during unit tests, if desired.
* lib: Refactor cal::database for more efficient function lookupMartin Braun2020-05-201-24/+41
| | | | | | | This is a refactoring with no functional change. Instead of hard-coding the lookup of RC and FILESYSTEM data, we loop over a structure holding those. This will make it easier to add more types of data lookup in the future.
* tests: Added unit test for Vector IIR RFNoC blockAaron Rossetto2020-05-192-0/+225
|
* rfnoc: Add Vector IIR RFNoC block supportAaron Rossetto2020-05-195-0/+285
|
* fpga: rfnoc: Add Vector IIR RFNoC blockWade Fife2020-05-199-20/+1452
|
* twinrx: Provide power cal IDMartin Braun2020-05-193-0/+19
| | | | | | | | | | | | | | | | | | Note that the TwinRX has a different behaviour if two or one channel are enabled. For that reason, TwinRX requires 8 different sets of calibration data: - For one vs. two channels - For channel 0 and channel 1 - For RX1 and RX2 Since every combination of these settings is possible, that results in 2^3 == 8 combinations. The choice of RX1 vs. RX2 is encoded in the calibration key. The choice of one vs. two channels is also encoded in the calibration key, and is derived using an expert node. Channel 0 and 1 are assumed symmetric, thus, the encoding for those happens in the calibration serial.
* basic/lf: Add IDs for calibration purposeMartin Braun2020-05-191-0/+4
| | | | | | | | This adds a property tree node "id" next to the "name" node. It is always either basicrx/lfrx/basixtx/lftx based on the daughterboard. The x300_radio_control uses this to help distinguish daughterboards for calibration's sake, where length strings, potentially with special characters, are too unwieldy.
* examples: Add usrp_power_meter exampleMartin Braun2020-05-192-1/+135
| | | | | | | | | | | This is a utility that can be used to measure received power, assuming a calibrated device. For example, it can be called like this: usrp_power_meter.py -a type=x300 -f 1e9 --mode continuous To continuously measure input power at 1 GHz.
* python: Add dsp sub-moduleMartin Braun2020-05-192-0/+84
| | | | | | | | | | | This lets you do >>> from uhd import dsp >>> s = dsp.signals.get_continuous_tone(...) >>> pwr = dsp.signals.get_power_dbfs(s) ...and so on. This module is for UHD-based utilities to have some additional signal processing functions to tap into.
* lib: pwr_cal: Fix power indexingMartin Braun2020-05-191-16/+28
| | | | | | | | | | | | | The pwr_cal::get_gain() method previously held the incorrect assumption that power values per frequency would be equidistant, i.e., be at the same indices as the gain values. Due to the frequency-dependent nature of the hardware, this is not a valid assumption (if that were the case, frequency-dependent calibration would be unnecessary). This changes get_gain() to not rely on that assumption. Note that it requires doing some more rounding: The bilinear interpolation method uses requires coordinates to be on a rectangular grid. This snaps the power values onto a single coordinate.
* lib: Add power cal managerMartin Braun2020-05-193-0/+426
| | | | | This is a utility class that can be used by USRP or daughterboard drivers to tie power calibration into their respective drivers.
* fpga: tools: Remove uhd_image_builderMartin Braun2020-05-184-1244/+0
| | | | | The image builder was replaced by rfnoc_image_builder, and has been obsolete since then.
* x300: Expand DRAM address space to 1GWade Fife2020-05-181-3/+3
| | | | | | The address ranges configured for the AXI interconnect IP limited the amount of accessible DRAM to two 32 MB regions. This change makes the full 1G available to all DRAM ports.
* rh: Remove unnecessary register read during set frequencyCiro Nishiguchi2020-05-151-3/+0
| | | | | This unnecessary reads causes timed commands on rhodium to block. It also makes it behave differently based on whether logging is enabled.
* rfnoc: Use large timeout for reads when timed commands existCiro Nishiguchi2020-05-151-8/+24
| | | | | If a timed command is in the queue, writes use a large timeout. Changing reads to do the same.
* utils: Fix usrp_burn_db_eeprom w.r.t. new property tree pathsMartin Braun2020-05-151-15/+38
| | | | | usrp_burn_db_eeprom operates directly on property tree paths, and so the utility required an update to work with RFNoC devices.
* utils: Correct relative path to config dir in rfnoc_image_builderAaron Rossetto2020-05-151-1/+1
| | | | | | | | | In commit 6a488d32, the RFNoC image builder module was moved from the host/utils/bin subdirectory to host/utils. That move rendered the relative path to the configuration directory in `get_config_path()` incorrect. This commit fixes the relative path specification of the configuration directory to reflect the new location of the Python script.
* images: Update manifestMichael West2020-05-131-12/+12
| | | | | | Update manifest with new FPGA images for b2xx, x3xx, e3xx, and n3xx. Signed-off-by: Michael West <michael.west@ettus.com>
* fpga: e31x: Replace symbolic link for CygwinWade Fife2020-05-121-1/+1
|
* fpga: tools: Fix HLS IP build with CygwinHumberto Jimenez2020-05-122-4/+10
|
* fpga: rfnoc: Clean up ctrlport_splitter usageWade Fife2020-05-122-2/+2
|
* fpga: utils: Optimize ctrlport_splitter for NUM_SLAVES = 1Wade Fife2020-05-121-45/+61
|
* uhd: Fix infinite recursion in N3xx timed commandsCiro Nishiguchi2020-05-124-31/+0
| | | | | | The implementation of set_command_time was calling wb_iface set_time, which in turn makes a recursive call to set_command_time. This removes the erroneous recursive call.
* docs: Remove six from Windows build instructionsMartin Braun2020-05-121-2/+1
| | | | | Recent commits have removed all usage of the 'six' Python module from UHD, thus removing the necessity to install it.
* rfnoc: Remove 'six' dependency from image builderMartin Braun2020-05-124-22/+22
| | | | Also fixes a few minor PyLint complaints.
* tests: Remove 'six' dependency from devtestMartin Braun2020-05-121-2/+1
| | | | This removes 'six' as a dependency for devtest.
* utils: Remove 'six' dependency, fix minor PyLint issuesMartin Braun2020-05-121-9/+8
| | | | | | | This removes the 'six' dependency from converter_benchmark, thus making the utils subdirectory no longer depend on six. A few Python2-isms and PyLint issues were also fixed.
* Docs: Update TwinRX documentationMichael West2020-05-121-13/+23
| | | | | | Revise tick rate and sample rate information for recent changes. Signed-off-by: Michael West <michael.west@ettus.com>
* multi_usrp_rfnoc: Misc fixesMichael West2020-05-121-6/+7
| | | | | | | | | - Change get_master_clock_rate() to return tick rate instead of sample rate - Make warning of incompatible rates conditional so it does not display for first channel Signed-off-by: Michael West <michael.west@ettus.com>
* TwinRX: Remove decimation from frontendMichael West2020-05-124-67/+59
| | | | | | | | | | | | | | The decimation in the rx_frontend_gen3 was added to reduce the bandwidth between the Radio and the DDC due to the limitation in bandwidth over the crossbar for dynamically connected blocks. The default FPGA image for the X300 now has a static connection between the Radio and DDC, so this is no longer necessary. This change allows the TwinRX receive channels to be time aligned with channels from other daughterboards so they can be used in the same streamer. Signed-off-by: Michael West <michael.west@ettus.com>
* DUC/DDC: Add variable time incrementMichael West2020-05-129-40/+67
| | | | | | | | | Sets time increment based on tick rate and sample rate instead of assuming one tick per sample. Defaults to legacy behavior. Minor compat number bumped on DUC and DDC blocks. Signed-off-by: Michael West <michael.west@ettus.com>
* X300: Make VITA time monotonicMichael West2020-05-121-2/+2
| | | | | | Make timekeeper tick on every cycle of the radio clock. Signed-off-by: Michael West <michael.west@ettus.com>
* uhd: Add reference power level API to multi_usrp and radio_controlMartin Braun2020-05-111-0/+2
| | | | This adds the has_* API calls to the Python API.
* uhd: Remove default channel input from power ref methodsCiro Nishiguchi2020-05-111-6/+6
| | | | | The radio_control methods shouldn't have a default value for the channel input, to keep them consistent with other methods in this class.
* fpga: Change default MTU to 10Wade Fife2020-05-115-5/+5
|