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* cmake: find python in sysroot path firstJoerg Hofrichter2020-08-041-0/+8
| | | | | | Set CMP0094 policy to NEW to make sure Python3 is first found in the SDK's sysroot if both the sysroot and the native paths are included in the PATH variable.
* cmake: tests: Support qemu also for python based testsJoerg Hofrichter2020-08-042-35/+71
| | | | This requires python3 to be installed in the target sysroot
* rfnoc: Fix compilation error when tracing enabledAaron Rossetto2020-07-311-2/+2
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* example: Check for failure in tx_samples_from_fileSamuel O'Brien2020-07-311-3/+9
| | | | | | | | | | | I was using this example for testing with the simulator. If there is a flow control failure, the original example would just silently finish, outputing the message "Done!" (Not even printing a timeout message). This commit asserts that the number of samples sent is equal to the number of samples provided. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* fpga: n320: Add BIST (AA) image filessteviez2020-07-315-0/+1148
| | | | | | | | | | This adds new image files which come with a DRAM FIFO. The addition of an N320 image with a DRAM FIFO allows DDR3 BIST to be run on an assembled (motherboard + daughterboard) N320. This image is intentionally very similar to the N300_AA and N310_AA targets which serve the same purpose of providing an image with a DRAM FIFO for their respective devices.
* utils: Use absolute paths in image builder build()steviez2020-07-311-2/+2
| | | | | | | A segment of the build() function updates the working directory. This change converts several paths to absolute paths to avoid having a relative path (such as one containing up-level references) deviate from its' intended meaning after the directory change.
* mpm: n3xx: bist: Read mboard and dboard eeprom to determine productSteve Czabaniuk2020-07-312-5/+14
| | | | | | | | The routine to identify products currently only reads the motherboard EEPROM. The N310 and N320/N321 use the same motherboard so these devices can't be distinguished using the motherboard EEPROM alone. This change makes get_product_id() read both the motherboard and daughterboard EEPROM in order to determine which N3xx it actually is.
* fpga: lib: Add xge features for new xport_svAndrew Moch2020-07-311-100/+191
| | | | | | | | | | - Made some things optional to reduce logic when used with the new xport_sv: (1) Clocking to sys_clk (2) Preamble insertion - New options to CUTTHROUGH faster on the TX path. The new xport_sv already has a gate to accumulate at its clock crossing.
* fpga: sim: Update PkgEthernetAndrew Moch2020-07-311-57/+91
| | | | | | Consolidated calcuation of last_tkeep and tkeep_last. Changed error checking to support unwrinkling tkeep/trailing changes in 100G etherent and support for testing packet dropping on backup.
* fpga: sim: Fix AxiLiteBfmAndrew Moch2020-07-311-3/+3
| | | | | AxiLiteBfm incorrectly included stb argument on rd() and printed actual response instead of expected in debug message.
* fpga: lib: Update AxiLiteIfAndrew Moch2020-07-311-1/+74
| | | | | This fixes a bug on wrstb in AxiLiteIf and adds a new AxiLiteIf_v that can be used to stitch onto Verilog port_maps.
* fpga: lib: Fix chdr_mgmt_pkt_handler when CHDR_W != 64Andrew Moch2020-07-301-1/+1
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* fpga: tools: RESOLVE_PATH checks for an empty pathAndrew Moch2020-07-301-4/+4
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* tests: Add unit test for siggen RFNoC block controllerAaron Rossetto2020-07-302-0/+352
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* python: Add siggen RFNoC block controller bindingsAaron Rossetto2020-07-303-0/+41
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* rfnoc: Add siggen RFNoC block controller supportAaron Rossetto2020-07-305-0/+553
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* fpga: rfnoc: Add Signal Generator RFNoC blockWade Fife2020-07-3013-18/+1980
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* fpga: lib: Add axis_packetize moduleWade Fife2020-07-302-0/+162
| | | | | | This module takes an AXI-Stream without TLAST and outputs the same AXI-Stream with TLAST based on the provided packet size input.
* python: Add Switchboard block python bindingsJesse Zhang2020-07-303-0/+24
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* rfnoc: Add Switchboard block unit testsJesse Zhang2020-07-302-0/+161
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* rfnoc: Add Switchboard block supportJesse Zhang2020-07-305-0/+181
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* fpga: Add Switchboard RFNoC blockJesse Zhang2020-07-308-0/+1162
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* mpm: Default virtual NIC CHDR IP selectionSteven Koo2020-07-306-16/+50
| | | | | This change adds detection for setting the correct internal fpga CHDR IP address when using embedded mode.
* images: Update manifestSteven Koo2020-07-291-10/+10
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* x300: Update maximum bitstream sizeWade Fife2020-07-281-1/+1
| | | | | | Add 2 bytes to account for Vivado update number, in addition to major, minor, and AR. For example the current Vivado version string might be 2019.1.1_AR73068 whereas the previous string was 2018.3_AR71898.
* mpm: Fix more gevent errors on SIGTERMSamuel O'Brien2020-07-281-6/+19
| | | | | | | | | | | | | Sometimes when running usrp_hwd.py in a terminal and then canceling it with Ctrl+C, it prints a really large stacktrace into the terminal resulting from an uncaught gevent BlockingSwitchOutError. This comes from trying to block on Process#join inside a gevent signal handler. This commit resolves this issue by simply triggering an event in the signal handler which prompts a different non-daemon thread to join the subprocesses and end the parent process. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* mpm: Fix documentation and minor issues in sys_utils.GPIOBankMartin Braun2020-07-281-6/+30
| | | | | | | | | | | - GPIOBank made the assumption that all bits used where contiguous. This amends the documentation to make that more clear, and adds an assert statement to check for that. - reset_all() would reset all pins, regardless of DDR value, rendering it useless for any GPIO bank that would want to have readable pins. Fixed that by checking DDR value before resetting. - Minor amendments to various docstrings; improve PyLint score by removing superfluous inheritance from object.
* docs: Fix daughterboard page formattingMartin Braun2020-07-241-3/+3
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* mpm: Fix gevent errors on SIGTERMSamuel O'Brien2020-07-242-5/+13
| | | | | | | | | | | | | | | | | | | | | | Sometimes when running usrp_hwd.py in a terminal and then canceling it with Ctrl+C, it prints a really large stacktrace into the terminal resulting from an uncaught gevent BlockingSwitchOutError. It seems like there was an attempt to catch this in usrp_hwd.py:kill_time(). This try-except was surrounding a call to Process.join() which, to the best of my knowledge, can't ever throw this exception. Based on my troubleshooting, this error comes from the SIGTERM signal handler of the RPC process. The handler (defined in rpc_server.py:_rpc_server_process), is just a direct call to RPCServer.stop(). When the server's backed is a thread pool, this call may block when joining the thread pool, causing gevent to complain about execution attempting to block in a signal handler. This commit resolves this issue by simply triggering an event in the signal handler which prompts a different thread to clean up the server and end the process. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* fpga, mpm: Bump FPGA compat numberRobertWalstab2020-07-246-6/+6
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* mpm: Don't index empty forwarding interface listAaron Rossetto2020-07-241-0/+1
| | | | | | If no internal interfaces are found to which to forward CHDR packets, return after printing the warning instead of attempting to index the empty list and generating an exception.
* mpm, mpmd: Bump MPM compat numberAaron Rossetto2020-07-242-2/+2
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* rfnoc: Support instance overrides in set_properties()Aaron Rossetto2020-07-246-5/+85
| | | | | | | | | | | | | | | | | | | | | | | This commit adds an enhancement to node_t::set_properties() in which the instance argument provided to the function (which normally applies to all properties in the key/value list) can be overridden on a per-property basis using a special syntax. If the key consists of the property name followed by a colon (':') and then a number, the number following the colon is used to determine which instance of the property this set pertains to, and the value passed via the instance parameter is ignored for that property. For example, in the following call: node->set_properties("dog=10,cat:2=5,bird:0=0.5", 1) instance 1 of node's 'dog' property is set to 10, the 1 coming from the instance parameter, instance 2 of the node's 'cat' property is set to 5 due to the override syntax provided in the string, and instance 0 of the node's 'bird' property is set to 0.5 due to its override. If the name/instance pair is malformed, e.g. 'value:=10' or 'value:foobar=10', a runtime error is thrown.
* images: Update manifestRobertWalstab2020-07-221-8/+8
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* TwinRX: Fix increased noise floormichael-west2020-07-211-1/+1
| | | | | | - Fixed bus width from 25 to 24 bits Signed-off-by: michael-west <michael.west@ettus.com>
* docs: Update PCIe xport instructions for NI ReposSteven Koo2020-07-201-46/+100
| | | | | This is an update to the documentation for installing the RIO PCIe transport infrastructure using the NI Linux Device Driver repository.
* cmakerc: Remove patch to CMakeRC.cmake (and move it one level up)Martin Braun2020-07-202-1/+1
| | | | | | | UHD's version of CMakeRC.cmake was patched from the upstream (see also 933eca1) to enable -fPIC for the RC targets. This can also be done outside of said file, avoiding us having to carry a patched version of CMakeRC, and using the vanilla upstream version instead.
* uhd: remove liberioRobertWalstab2020-07-2014-524/+2
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* mpmd: remove liberioRobertWalstab2020-07-204-213/+0
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* fpga: remove liberioRobertWalstab2020-07-204-127/+3
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* fpga: rfnoc: Fix testbenches to run under ModelSimWade Fife2020-07-209-89/+68
| | | | | | This updates the makefiles for the testbenches so they can be run using "make modelsim" without any additional hacks. The "xsim" and "vsim" simulation targets also still work.
* fpga: e31x: Add gitignore fileMartin Braun2020-07-181-0/+8
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* e31x: Minor cleanup on top-level e31x.v moduleMartin Braun2020-07-182-15/+14
| | | | | | - Fixed some incorrect comments - Fixed some missing wire declarations for internal NIC - Fix wire declarations for GPIO (they were declared too late)
* e31x: Swap out liberio for internal ethernet in the idle imageRobertWalstab2020-07-181-2/+2
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* e31x: fpga: connect device_idRobertWalstab2020-07-181-1/+5
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* filter API: Fix multi_usrp tx callsSteven Koo2020-07-171-4/+2
| | | | | Adding the fix to use fs_path instead of tx_rf_fe_root. This was done to the rx methods and should have been done for the tx ones as well.
* multi_usrp: Add get_radio_control() API callMartin Braun2020-07-165-0/+33
| | | | | This is an advanced API call that allows direct underlying access to the radio_control object for RFNoC devices.
* multi_usrp: Fix some documentationMartin Braun2020-07-161-1/+3
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* dissector: Swap chdr_packet for chdr_packet_writerSamuel O'Brien2020-07-162-2/+2
| | | | | | | A recent commit changed the name of chdr_packet in uhd. This commit accounts for this change and makes the dissector compile again. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* fpga: rfnoc: Add RFNoC Moving Average blockWade Fife2020-07-169-0/+1642
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