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* host: x410: Cache GPIO source in mb_controllerLane Kolbly2022-03-233-1/+12
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* Fix handling of discontinuities in power calibration dataLars Amsel2022-03-237-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The power that corresponds to a certain gain values depends on the frequency band we are in. At the edges of these bands discontinuities can occur (the gain necessary to achieve the same power value changes non-continuously). The power calibration does a linear interpolation between two neighbor points in the calibration data set to find at best fitting value. We therefore have to make sure that this interpolation does not cross discontinuities. This is a minimal invasive approach. It adds values at discontinuities for the lower and the upper band. The power calibration format uses the frequency for a power to gain mapping as a map key. Therefore two gain to power mappings cannot be stored for the same frequency as it would be needed for the discontinuity. Instead the mapping for the lower band is stored at the discontinuity frequency itself. The mapping for the upper band is stored at the frequency + 1Hz. The calibration will therefore still fail to yield proper results within this sub-Hertz range. The frequency lookup in the power calibration manager now uses round instead of truncation to find the best mapping frequency in the calibration table. With this, searching for neighbor data points now ensures that the data points used belong to the same band (except for the range of (f_discontinuity, f_discontinuity + 1Hz) ). This commit does not solve the issue for calibration data generated with usrp_power_cal.py because the Python interface has no means to detect band edges for the USRP it is calibrating.
* fpga: e31x: Update DRAM IP simulationWade Fife2022-03-231-4/+22
| | | | | Update the simulation to use the renamed IP. Add ModelSim support.
* fpga: e31x: Fix DRAM traffic gen IP nameWade Fife2022-03-231-1/+1
| | | | | Change name in DRAM IP Makefile from IP_MIG_7SERIES_TG_SRCS to IP_DDR3_16BIT_TG_SRCS to match the naming of other variables.
* docs: Improve table on 'identification'Martin Braun2022-03-231-8/+8
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* fixup! docs: Update instructions for changing hostnameWade Fife2022-03-231-2/+2
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* docs: Update instructions for changing hostnameWade Fife2022-03-233-12/+12
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* docs: Update sfp port config locationWade Fife2022-03-232-4/+4
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* mpm: Factor out common code between E31x_db and Neon classesMartin Braun2022-03-175-314/+222
| | | | | These classes share a *lot* of common code, due to them both being AD9361-based devices. This code is now factored out into a single file.
* mpm: e3xx: Fix Pylint warnings in periph_mgr classesMartin Braun2022-03-172-14/+11
| | | | | | - Whitespace - Long lines - Superfluous imports
* host: Add power_reference_iface::sptr declarationLane Kolbly2022-03-171-0/+2
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* fpga: ci: Schedule weekly FPGA pipeline runHumberto Jimenez2022-03-161-0/+8
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* fpga: ci: Improve IP build cachingHumberto Jimenez2022-03-151-8/+20
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* fpga: ci: Add stages-based pipelineHumberto Jimenez2022-03-1513-271/+613
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* fpga: ci: Ignore objects in hwtoolsHumberto Jimenez2022-03-151-0/+2
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* fpga: tools: Add CG_400 image to X410 binaries packageHumberto Jimenez2022-03-151-0/+5
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* docs: Update manual for new X410 default targetsWade Fife2022-03-142-14/+18
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* fpga: x400: Add x410_400_128_rfnoc_image_coreWade Fife2022-03-145-3/+1613
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* docs: Fix Doxygen warningsMartin Braun2022-03-142-18/+5
| | | | | | - Removed variables that have been deprecated in newer Doxygen versions - Replaced <speedgrade> with $speedgrade in E310 manual; Doxygen thinks it's an HTML tag.
* python: Add __init__ to uhd.utilsMartin Braun2022-03-141-0/+0
| | | | | | | | | | | | | | | | | Without this, the following code fails: >>> import uhd >>> U = uhd.usrp.MultiUSRP("type=x4xx") >>> M = U.get_mpm_client() Traceback (most recent call last): File "<input>", line 1, in <module> M = U.get_mpm_client() File ".../uhd/usrp/multi_usrp.py", line 37, in <lambda> setattr(self, 'get_mpm_client', lambda: _get_mpm_client(token, mb_args)) File ".../uhd/usrp/multi_usrp.py", line 19, in _get_mpm_client from uhd.utils import mpmtools ModuleNotFoundError: No module named 'uhd.utils'
* host: Create meta_range_t::as_monotonicLane Kolbly2022-03-143-1/+62
| | | | | | | | In order to perform certain operations (start/stop/step), meta_range_t objects must be "monotonic", meaning that the subranges composing it are sorted and non-overlapping. This commit creates a method which takes a non-monotonic meta_range_t containing no non-continuous subranges and converts it into a monotonic meta_range_t.
* docs: Fix reference to RFNoC documentationMartin Braun2022-03-141-1/+7
| | | | This fixes links to RFNoC docs in the "Coding to the API" section.
* docs: rdtesting: Remove invalid rate configurationMartin Braun2022-03-141-1/+0
| | | | | Removes an invalid rate configuration for N310 functional FPGA verification tests.
* host: test: Add UHD_UNITTEST_LOG_LEVEL overrideLane Kolbly2022-03-113-21/+55
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* docs: stream_args: Clarify usage of stream_args_t::channelsMartin Braun2022-03-111-15/+23
| | | | | This vector is no longer used with RFNoC devices. We remove references to X300 from the example, and instead use B210 as an example.
* rfnoc: Remove UHD3-API usagesMartin Braun2022-03-112-14/+0
| | | | | | | - rfnoc_replay_samples_from_file still had UHD3-vestiges for selecting block port and ID - The documentation for stream_args_t also included block port and ID examples
* images: Update manifest and compat number for X410Aaron Rossetto2022-03-102-2/+2
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* fpga: rfnoc: Fix PPS edge detectionmichael-west2022-03-091-1/+1
| | | | | | | Make timekeeper module sample rising edge instead of falling edge of PPS signal. Signed-off-by: michael-west <michael.west@ettus.com>
* docs: n3xx: Add info on customizable band edges and gain profilesMartin Braun2022-03-091-0/+45
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* fpga: rfnoc: Make Replay packet length independent of burst sizeWade Fife2022-03-092-106/+158
| | | | | | | | | | | | | Before this change, the packet size output by the Replay block during playback was limited to length of a full memory burst transaction. This led to relatively small packets during playback (typically 2 KiB) and had other side effects, such as simultaneous playback from two different memory locations using different packet sizes because of differences in memory alignment. With this change, the configured packet size, as set by the register REG_PLAY_WORDS_PER_PKT, is used for all packets except the last packet of playback, which can of course be smaller.
* fgpa: rfnoc: Set Replay memory transactions to 2 KiBWade Fife2022-03-092-7/+15
| | | | | | | This sets the Replay block's counter width so that memory bursts are up to 2 KiB. Previously, the counter width was fixed, which meant that wide memories would require especially large buffers and could exceed the 4 KiB limit imposed by AXI.
* fpga: Add SPDX license identifierAaron Rossetto2022-03-091-0/+2
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* rfnoc: radio: Explicitly set MTU forwarding policy to DROPMartin Braun2022-03-081-0/+1
| | | | | | | | | | | This is a follow-up to 930fa39, where we set the MTU property explicitly for several blocks. The radio block should also receive this treatment, as the IQ data going into its inputs is not forwarded to its outputs. This patch will remove spurious log messages like these: [INFO] [0/Radio#0] Setting default MTU forward policy. [INFO] [0/Radio#1] Setting default MTU forward policy.
* tests: Apply clang-format to convert_testAaron Rossetto2022-03-081-177/+259
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* tests: Fix converter benchmark disable on Boost <1.68Aaron Rossetto2022-03-081-0/+80
| | | | | | | | | | | | | | | | Boost versions prior to 1.68 appear to have a bug where a decorator to denote a test as disabled is not honored when affixed to a data-driven test case, which is how the benchmarks in convert_test are skipped when the unit test is run. (The tests take some time to complete and we don't want them running with every CI pass.) This commit adds an alternative benchmark skipping mechanism when Boost <1.68 is used. The benchmark test cases perform a runtime check for the user-provided `--benchmark` command-line option. If not found, the test case returns prematurely. If found, the test case will execute. Note that because `--benchmark` is a command-line option specific to this test, and not to Boost, the options must follow `--` in the command line in order to take effect: `convert_test -- --benchmark`.
* tests: Atomicize counters in benchmark_rateAaron Rossetto2022-03-071-10/+10
| | | | | | | | The counters that keep track of overruns, underruns, number of samples transferred, etc., were not atomic. Thus, running benchmark_rate with multiple threads would result in inaccurate statistics being reported at the end of the run. This commit makes those counters atomic variables so that they are updated properly.
* docs: x4xx: Add new FPGA image descriptionsWade Fife2022-03-041-20/+44
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* fpga: x400: Cleanup FPGA MakefileWade Fife2022-03-041-40/+61
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* fpga: x400: Add support for DRAM with 400 MHz BWWade Fife2022-03-042-22/+24
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* fpga: x400: Change AXI XB for DRAM to 512-bitWade Fife2022-03-041-106/+17
| | | | | | Change the width of the crossbar in the AXI Interconnect IP from 256-bit to 512-bit to match the DRAM memory controller width and to give better performance.
* fpga: rfnoc: Fix strobe probability in radio simulatorWade Fife2022-03-041-7/+7
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* fpga: rfnoc: Regenerate noc_shellsWade Fife2022-03-0419-30/+49
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* rfnoc: Fix block buffer sizes referring to MTUWade Fife2022-03-048-17/+23
| | | | | | | In the HDL, the parameter named 'MTU' is clog2 of the size of the desired MTU. For example, when the 'MTU' parameter is 10, that means the actual MTU setting is 2**MTU or 1024. So we need to set our buffers to 2**MTU if we want them to be one MTU in size.
* utils: Fix comment in noc_shell Mako templateWade Fife2022-03-041-0/+1
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* fpga: x400: Add SPI Controller Info registerJavier Valenzuela2022-03-046-11/+156
| | | | | | Include a register that contains SPI controller information. Currently, it only provides the number of slaves addressable by the SPI engine.
* fpga: x400: Adjust SPI engine strobes alignmentJavier Valenzuela2022-03-044-9/+14
| | | | | | Modify behavior of clock crossing between radio_clk and radio_clk_2x. This ensures strobe signals are always asserted for a single radio_clk_2x cycle and when radio_clk is low.
* examples: benchmark_rate improvementsmichael-west2022-03-031-95/+124
| | | | | | | - Added support for tx_spb and rx_spb arguments - Fixed TX thread timestamp for single channel Signed-off-by: michael-west <michael.west@ettus.com>
* rfnoc: Refactor ctrlport_endpoint; fix MT issuesAaron Rossetto2022-03-031-121/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit refactors ctrlport_endpoint and fixes several issues related to multiple threads sending and receiving control transfers. First, it refactors the change that Martin Braun implemented in 0caed5529 by adding a tracking mechanism for control requests where clients have explicitly asked to receive an ACK when the corresponding control response is received. When a client wants to wait for an ACK associated with a control request, a combination of that request's opcode, address, and sequence number is added to a set when the request is sent. When a control response is received, the set is consulted to see if the corresponding request is there by matching the packet field data listed above. If so, the control response is added to the response queue, thus notifying all threads waiting in `wait_for_ack()` that there is a response that the thread may be waiting on. If the request is not in the set, the request is never added to the response queue. This prevents the initial problem that 0caed5529 was addressing of the response queue growing infinitely large with control responses that would never be popped from the queue. Secondly, it addresses issues when multiple threads have sent a request packet and are waiting in `wait_for_ack()` on the corresponding response. Originally, the function contained a loop which would sleep the calling thread until the control response queue had at least one element in it. When awakened, the thread would pop the frontmost control response off the queue to see if it matches the corresponding control request (i.e., has the same sequence number, opcode, and address elements). If so, the response would be handled appropriately, which may include signalling an error if the response indicates an exceptional status, and the function would return. If the response is not a matching one, the function would return to the top of the loop. If the corresponding response is not found within a specified period, the function would throw an op_timeout exception. However, there is a subtle issue with this algorithm when two different calling threads submit control requests and end up calling `wait_for_ack()` nearly simultaneously. Consider two threads issuing a control request. Thread T1 issues a request with sequence number 1 and thread T2 issues a request with sequence number 2. The two threads then call `wait_for_ack()`. Let's assume that neither of the control reponses have arrived yet. Both threads sleep, waiting to be notified of a response. Now the response for sequence number 1 arrives and is pushed to the front the response queue. This generates a signal that awakes one of the waiting threads, but which one is awakened is completely at the mercy of the scheduler. If T1 is awakened first, it pops the response from the queue, finds that it matches the request, and handles it as expected. Later, when the reponse for sequence number 2 is pushed onto the queue, the still-sleeping T2 will be awakened. It pops the response, finds it to be matching, and all is well. But if the scheduler decides to wake T2 first, T2 ends up popping the response with sequence number 1 off the front of the queue, but it doesn't match the request that T2 sent with sequence number 2, so T2 goes back to the top of the loop. At this point, it doesn't matter if T2 or T1 is awakened next; because the control response for sequence number 1 was already popped off the queue, T1 never sees the control response it expects, and will throw uhd::op_timeout back up the stack. This commit modifies the `wait_for_ack()` algorithm to search the queue for a matching response rather than indiscriminately popping the frontmost element from the queue and throwing it away if it doesn't match. That way, the order in which threads are awakened no longer matters as they will be able to find the corresponding response regardless. Furthermore, when a response is pushed onto the response queue, all waiting threads are notified of the condition via `notify_all()`, rather than just waking one thread at random (`notify_one()`). This gives all waiting threads the opportunity to check the queue for a response. Finally, the `wait_for_ack()` loop has been modified such that the thread waits to be signalled regardless of whether the queue has elements in it or not. (Prior to this change, the thread would only wait to be signalled if the queue was empty.) This effectively implements the behavior that all threads are awakened when a new control response is pushed into the queue, and combined with the changes above, ensures that all threads get a chance to react and check the queue when the queue is modified.
* mpm: fix ref_locked sensor on n320David Raeman2022-03-031-0/+15
| | | | | | | | | | | | | | | | The ref_locked mboard sensor on the n320 always returned true without querying hardware. On this device family, mboard sensor callback in n3xx.py returns the "and" of its daughterboard LMK PLLs by querying the get_ref_lock() function on each dboard manager. However, that function only existed for the Magnesium daughterbaord. For the Rhodium daughterboard, the function didn't exist and so a true value was automatically returned. This commit adds the get_ref_lock() implementations for Rhodium and EISCAT daughterboards, which are identical to the implementation already present for Magnesium. Co-authored-by: Martin Braun <martin.braun@ettus.com>
* mpm: rh: Minor linter cleanupMartin Braun2022-03-031-8/+5
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