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* B200: Restore asynchronous reset of AD936x.michael-west2018-10-174-8/+19
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* e320: Added E320 docs page, reg map updatedSugandha Gupta2018-10-172-0/+707
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* lmx2592: remove initial scratch register readbackMark Meserve2018-10-171-24/+0
| | | | | - This is the only read operation in the driver, so removing it simplifies the driver's requirements significantly.
* lmx2592: add spur dodgingMark Meserve2018-10-172-23/+330
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* lib: ad9361: De-boostify AD9361 driverMartin Braun2018-10-172-106/+195
| | | | No functional or API changes.
* N310: Clarify logging for when re-inits occurTrung Tran2018-10-161-0/+2
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* mpm: n3xx: Fix Pylint warningsMartin Braun2018-10-121-11/+12
| | | | | This commit contains whitespace and formatting changes only. No functional changes.
* mpm: dboard_manager: add more args to update_ref_clock_freqTrung Tran2018-10-123-8/+10
| | | | | | | | | | | | | | | Summary: This change will allow correct args to pass from mboard to dboards, that in turn can be useful for dboard manager. Details: In N310, the dboard manager needs the time source to be updated before calling update_ref_clock_source(), because it will trigger a reinit of the dboard, for which the time_source is essential to determine correct clock synchronizer settings. The special case is the white rabbit time source needs a different internal ref_clock_frequency for the clock synchronizer than the passed in ref_clock_freq.
* docs: Fix N210 MIMO Phase Alignment commandBrent Stapleton2018-10-121-1/+1
| | | | | | | The synchronization source for the N210 MIMO phase alignment needs to be set to anything other than 'pps' or 'auto' (which is actually 'pps'). 'default' skips the call to `set_time_unknown_pps`, which is the proper way to synchronize in this sitation.
* utils: fix bmark_rate MIMO synchronizationBrent Stapleton2018-10-121-9/+10
| | | | | | | | | | Fix USRP2 MIMO synchronization in benchmark_rate. When synchronizing N2XXs connected with a MIMO cable, only the master's time needs to be set; the slave will be synchronized automatically. Currently, calling set_time_unknown_pps will attempt to synchronize the slave on the next PPS, which can cause problems since the MIMO cable doesn't propogate a PPS signal.
* uhd: Improve documentation for the UHD exception typesMartin Braun2018-10-121-0/+51
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* multi_usrp: Add sync_source APIMartin Braun2018-10-112-6/+211
| | | | | | | | | | The sync_source API is an atomic setter for all sync-related settings. If supported by the underlying USRP, it can be faster to call set_sync_source() rather than sequentially calling set_clock_source() and set_time_source(). If the underlying device does not support the sync_source API, it will fall back to the set_clock_source() and set_time_source() APIs, making this change backward-compatiple.
* tools: Add tool to analyze settling time of gain of freq changesMartin Braun2018-10-111-0/+249
| | | | | | | | | | | | | | This tool uses the Python API to acquire a snapshot of samples during a gain or frequency change. It can be used to analyze the settling time of analog components, as well as the accuracy in time. It has two combinable ways of analyzing the data: 1) Write it to a file, or 2) plot the time-domain data. Example: This would receive several seconds of data from an X3x0 device, tune to 1 GHz, and then bump the gain by 30 dB after a set amount of time: $ rx_settling_time.py -a type=x300 -f 1e9 -g 0 --new-gain 30 --plot
* uhd: Add benchmark_streamer exampleCiro Nishiguchi2018-10-112-0/+498
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* uhd: Add traffic counter to null source sinkCiro Nishiguchi2018-10-112-0/+100
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* mpmd: Increase rpcc timeout when calling set_time_source()Trung Tran2018-10-111-0/+2
| | | | | | | set_time_source() for N310 and N300 can take longer than the default RPC client timeout of 2 seconds due to dboard initialization. We need increase this timeout, by using the init timeout value which is 2 minutes.
* docs: Added TwinRX pageDerek Kozel2018-10-095-0/+91
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* mpm: Add usrp_update_fsMartin Braun2018-10-092-0/+195
| | | | | | | This provides a new utility for MPM devices (usrp_update_fs.py), which goes through all the necessary steps to update a filesystem. Will trigger a mender update, but the tool is not specific to Mender and can be changed to use other methods in the future.
* mpm: Add __mpm_device__ as usrp_hwd module variableMartin Braun2018-10-092-0/+2
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* uhd: Fix rounding in ddc/duc rate calculationCiro Nishiguchi2018-10-052-2/+2
| | | | | | | | The DDC and DUC convert the requested rate to an integer before selecting a decimated / interpolated rate. This causes the selection to select a lower rate than requested in some corner cases. The effect is more pronounced when the input rate of the DDC or the output rate of the DUC is very small.
* mg: fixup set_rx_antennaTrung Tran2018-10-041-1/+1
| | | | | | After going to 2 radios configuration (FPGA), the channnel value is passed into this set_rx_antenna now have value either 0 or 1. We want the mapping of {radio_channel:cpld_channel} = {0:CHAN1} or {1:CHAN2}.
* multi_usrp: move definition of constantsAndrew Lynch2018-10-042-2/+4
| | | | ALL_MBOARDS and ALL_CHANS will be exported on GCC and MSVC
* uhd: reconcile time_spec operators with boost conceptsMark Meserve2018-09-282-18/+14
| | | | | | - Removes operator+ which was ambiguously defined in some cases - Adds additive concept for time_spec_t and double operators - Remove unnecessary ctime header
* rfnoc: install the DMA FIFO block headerMarcus Müller2018-09-261-0/+1
| | | | Reported-by: Brian Padalino <bpadalino@gmail.com>
* e320: devtest: Reduce sample rate for 1G devtestSugandha Gupta2018-09-261-1/+1
| | | | | | The E320 default master clock rate is 16MHz, therefore we need to reduce the 2 channel receive rate to 8MHz in order to be able to meet the requested rate.
* n3xx: e320: fixing GPSDIface sensor namesBrent Stapleton2018-09-262-2/+2
| | | | | N3xx and E320 were registering GPSDIface names as get_*_sensor instead of just the sensor name. Fixing this to now register the sensor name.
* cores: Update rx_frontend_gen3.v controls for 1/4-rate mixerMartin Braun2018-09-254-10/+14
| | | | | | | This tracks the changes on rx_frontend_gen3.v, which was updated to use a quarter-rate downconverter instead of a generic CORDIC. The X3x0 FPGA compat number is incremented as the rx_frontend is part of the device architecture rather than an RFNoC block.
* e320: Fix master_clock_rate settingSugandha Gupta2018-09-241-0/+4
| | | | | | The master clock rate was getting overwritten while running the codec loopback self test. So now we save the current rate before running the test and then reapply it.
* e320: Add R&D testing procedureSugandha Gupta2018-09-242-13/+204
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* examples: add rfnoc_radio_loopbackTrung Tran2018-09-142-0/+214
| | | | This example will allow an RF->RF loopback using RFNoC devices.
* uhd: rfnoc: add async message handlerTrung Tran2018-09-147-9/+421
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* radio_ctrl: add disable time stampTrung Tran2018-09-143-0/+13
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* devtest: n3x0: Enable rx_samples_to_file testSugandha Gupta2018-09-141-1/+1
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* mg: clipping frequencyTrung Tran2018-09-142-4/+7
| | | | | Clipping requested frequency to acceptable ranges in Magnesium TX/RX set frequency functions.
* usb: fix dummy compilation in msvcMark Meserve2018-09-141-0/+8
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* Import changelog from UHD-3.13 branchMartin Braun2018-09-131-0/+14
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* x300_impl: remove default_buff_args propertiesTrung Tran2018-09-131-7/+0
| | | | ...that are already handled in udp_zero_copy.
* device3_io_impl: remove tx_hint[send_buff_size]Trung Tran2018-09-131-6/+0
| | | | | we're no longer need this. Because there are default send buff size in each transport type impl.
* mpmd: add link speed to xport udpTrung Tran2018-09-131-6/+29
| | | | This is used to determine send_buff_size and recv_buff_size
* mpm: add link_speed xport_infoTrung Tran2018-09-132-0/+22
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* udp_zero_copy: add default xport params.Trung Tran2018-09-131-14/+58
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* fixup! DDC/DUC: switch CORDIC -> DDS for all relevant variable namesmichael-west2018-09-132-12/+12
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* host: lib: convert: Add CMake flag for NEON SIMDBrent Stapleton2018-09-121-1/+5
| | | | | | | Adding CMake flag to enable/disable NEON SIMD instructions. This is an addition to the previous checks (check for NEON headers and checking the size of pointers), so behavior is unchanged unless users specify that they do not want to use NEON instructions.
* devtest: e320: Re-enable rx_samples_to_file testSugandha Gupta2018-09-121-1/+1
| | | | | The test has been fixed in commit 9c7d251b32eb476e11f8fce13a797c4de9abc796 to parse for D and S correctly
* e320: gpio: Fix front panel GPIO readbackSugandha Gupta2018-09-122-2/+5
| | | | The gpio devtest passes after this fix. Enabling the test
* tools: Fix handling of 0-valued dt-compatAlex Williams2018-09-121-1/+3
| | | | | | A value of 0 for dt-compat would cause db-init to use the rev instead. This fixes the check to be on number of args instead of the dt-compat value.
* python: Fix duration of benchmark rateBrent Stapleton2018-09-121-1/+1
| | | | | | | | Duration of multichannel benchmark was 50 seconds longer than intended- a 50ms initialization delay was mistakenly multiplied by 1000. Fixes e735a63ff9e ("python: Adding Python API benchmark rate")
* docs: Minor tweaks to the Python API manual pageMartin Braun2018-09-101-2/+4
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* n3xx: Get RFNoC crossbar baseport from FPGABrent Stapleton2018-09-064-4/+9
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* e320: Get RFNoC crossbar baseport from FPGABrent Stapleton2018-09-062-2/+8
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