| Commit message (Collapse) | Author | Age | Files | Lines | |
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| * | Merge branch 'burn_dbid' into pre_merge | Josh Blum | 2010-06-18 | 8 | -44/+343 |
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| | * | uhd: added checking for xcvr dbids, added unknown dboard rx and tx ↵ | Josh Blum | 2010-06-18 | 3 | -14/+301 |
| | | | | | | | | | constructors (for bad dbids or combinations) | ||||
| | * | uhd: added dboard manager call to register xcvr board, implemented in xcvr ↵ | Josh Blum | 2010-06-18 | 6 | -32/+44 |
| | | | | | | | | | dboard code | ||||
| * | | usrp2: updated fpga build notes | Josh Blum | 2010-06-18 | 1 | -1/+1 |
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| * | | Merge branch 'uhd_fpga_merge' into pre_merge | Josh Blum | 2010-06-18 | 268 | -901/+1835 |
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| | * \ | Merge branch 'master' of ettus.sourcerepo.com:ettus/fpga into uhd_master | Josh Blum | 2010-06-15 | 268 | -901/+1835 |
| | |\ \ | | | | | | | | | | | | | | | | | Conflicts: fpga/.gitignore | ||||
| | | * | | new make works on ise12 | Matt Ettus | 2010-06-14 | 1 | -1/+7 |
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| | | * | | produces good bin files | Matt Ettus | 2010-06-11 | 4 | -57/+31 |
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| | | * | | first attempt at cleaning up the build system | Matt Ettus | 2010-06-10 | 38 | -422/+583 |
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| | | * | | get rid of debug stuff to help timing | Matt Ettus | 2010-06-08 | 1 | -7/+16 |
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| | | * | | move u2_core into u2_rev3 directory to simplify directory structure and save ↵ | Matt Ettus | 2010-06-08 | 5 | -46/+2 |
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| | | * | | allow other clock rates in vita time | Matt Ettus | 2010-06-08 | 1 | -13/+15 |
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| | | * | | report ise version in build | Matt Ettus | 2010-06-07 | 1 | -1/+1 |
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| | | * | | proper name for directory | Matt Ettus | 2010-06-07 | 1 | -1/+1 |
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| | | * | | name build directory with ISE version name | Matt Ettus | 2010-06-07 | 1 | -1/+1 |
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| | | * | | non-udp uses a different address for the tx dsp core | Matt Ettus | 2010-05-27 | 1 | -1/+1 |
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| | | * | | manual merge to use localparams from udp version | Matt Ettus | 2010-05-27 | 1 | -4/+23 |
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| | | * | | from UDP branch, changed names because I want these separate from the ↵ | Matt Ettus | 2010-05-27 | 3 | -0/+1321 |
| | | | | | | | | | | | | | | | | | non-udp versions | ||||
| | | * | | ignore output files | Matt Ettus | 2010-05-27 | 1 | -0/+2 |
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| | | * | | new files from udp branch added to main Makefile | Matt Ettus | 2010-05-27 | 1 | -1/+19 |
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| | | * | | Merge branch 'udp' into master_merge_take2 | Matt Ettus | 2010-05-27 | 30 | -67/+2257 |
| | | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * udp: (67 commits) better test program for just the tx side fix typo, no functionality difference ignores move dsp settings regs to reclocked setting bus. Works, gets us to within 18ps of passing timing reverting logic clean up which should have made timing better, but made it worse instead moved fifos around, now easier to see where they are and how big bigger fifo on UDP TX path, to possibly fix overruns on decim=4 Xilinx ISE is incorrectly parsing the verilog case statement, this is a workaround pps and vita time debug pins ignore emacs backup files more debug for fixing E's better debug pins for going after cascading E's copy in wrong place copied over from quad radio just debug pin changes typo caused the tx udp chain to be disconnected moved into subdir speed up timing by ignoring the too_early error. We'll need to FIXME this later Added set time and set time at next pps. Removed the old sync pps commands, they dont make sense to use anymore. moved around regs, added a bit to allow for alternate PPS source ... | ||||
| | | | * | | better test program for just the tx side | Matt Ettus | 2010-05-19 | 1 | -163/+63 |
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| | | | * | | fix typo, no functionality difference | Matt Ettus | 2010-05-19 | 1 | -1/+1 |
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| | | | * | | Merge branch 'master' into udp | Matt Ettus | 2010-05-18 | 224 | -329/+19 |
| | | | |\ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove CVS files, warning removal on setting reg width, aeMB synthesis pragmas Conflicts: usrp2/control_lib/setting_reg.v usrp2/top/u2_core/u2_core.v usrp2/top/u2_rev3/Makefile | ||||
| | | * | | | get rid of some warnings by declaring setting reg width | Matt Ettus | 2010-05-18 | 1 | -8/+8 |
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| | | * | | | added width parameter to avoid warnings (thanks IJB) and default value parameter | Matt Ettus | 2010-05-18 | 1 | -3/+5 |
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| | | * | | | added pragmas suggested by Ian Buckley to help ISE12 synthesis | Matt Ettus | 2010-05-18 | 1 | -3/+6 |
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| | | * | | | get rid of old CVS linkage | Matt Ettus | 2010-05-18 | 221 | -315/+0 |
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| | | * | | | settings bus to dsp_clk now uses clock crossing fifo | Matt Ettus | 2010-05-16 | 2 | -8/+15 |
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| | | | * | | ignores | Matt Ettus | 2010-05-18 | 1 | -1/+1 |
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| * | | | | | Merge branch 'i2c_resize' into pre_merge | Josh Blum | 2010-06-18 | 5 | -11/+13 |
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| | * | | | | | usrp2 mb: replace hard coded constants with macros for rx offset | Josh Blum | 2010-06-18 | 1 | -2/+2 |
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| | * | | | | | usrp2: enlarged the i2c transaction size, rev-ed the firmware protocol ↵ | Josh Blum | 2010-06-17 | 4 | -9/+11 |
| | | |_|_|/ | |/| | | | | | | | | | | | | | number, added constants for packet sizes | ||||
| * | | | | | usrp2: code and comment tweak for aux dac call | Josh Blum | 2010-06-17 | 1 | -4/+3 |
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| * | | | | | uhd: added enums for aux adc and dac, usrp2: implemented enums in db iface | Josh Blum | 2010-06-17 | 5 | -22/+38 |
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| * | | | | | usrp2: implemented dboard clock divider control in usrp2 clock control | Josh Blum | 2010-06-17 | 1 | -8/+35 |
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| * | | | | | added set clock rate, and get clock rates to dboard iface, usrp2 needs clock ↵ | Josh Blum | 2010-06-17 | 4 | -3/+81 |
| |/ / / / | | | | | | | | | | | | | ctrl implementation... | ||||
| * | | | | uhd: check priority range | Josh Blum | 2010-06-17 | 1 | -5/+4 |
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| * | | | | uhd: working windows implementation of thread priority setting, added called ↵ | Josh Blum | 2010-06-16 | 3 | -2/+14 |
| | | | | | | | | | | | | | | | | | to example apps | ||||
| * | | | | uhd: work on thread priority scheduling | Josh Blum | 2010-06-16 | 9 | -65/+193 |
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| * | | | Merge branch 'sched' | Josh Blum | 2010-06-15 | 5 | -1/+143 |
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| | * | | | uhd: added ability to boost rt priority, added general app notes | Josh Blum | 2010-06-15 | 5 | -1/+143 |
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| * | | | | usrp2: added a type to the address args to filter based on type usrp2 | Josh Blum | 2010-06-15 | 1 | -1/+4 |
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| * | | | Merge branch 'work' | Josh Blum | 2010-06-14 | 4 | -16/+73 |
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| | * | | | usrp2: improved print-out for socket buffer sizing | Josh Blum | 2010-06-14 | 1 | -2/+5 |
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| | * | | | work on algorithms and documentation | Josh Blum | 2010-06-14 | 3 | -14/+68 |
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| * | | | | Merge branch 'aux_dac' | Josh Blum | 2010-06-14 | 6 | -21/+83 |
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| | * | | | usrp2: dboard iface: switched to nested dictionary for dac regs | Josh Blum | 2010-06-14 | 1 | -8/+17 |
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| | * | | | Fixed USRP2 aux_dac numbering convention | Jason Abele | 2010-06-11 | 4 | -16/+18 |
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| | * | | | created capability for meta-registers | Josh Blum | 2010-06-09 | 2 | -2/+53 |
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