5 files changed, 8 insertions, 26 deletions
diff --git a/usrp2/top/E1x0/u1e.v b/usrp2/top/E1x0/u1e.v
index dbd6173f3..4f85b7d6e 100644
--- a/usrp2/top/E1x0/u1e.v
+++ b/usrp2/top/E1x0/u1e.v
@@ -76,7 +76,7 @@ module u1e
    clk_doubler (.CLKFB(clk_fb), .CLKIN(clk_fpga_in), .RST(dcm_rst), 
                 .DSSEN(0), .PSCLK(0), .PSEN(0), .PSINCDEC(0), .PSDONE(), 
 		.CLKDV(), .CLKFX(), .CLKFX180(), 
-                .CLK2X(), .CLK2X180(), 
+                .CLK2X(clk_2x), .CLK2X180(), 
                 .CLK0(clk_fb), .CLK90(clk_fpga), .CLK180(), .CLK270(), 
                 .LOCKED(dcm_locked), .STATUS());
 
@@ -141,7 +141,7 @@ module u1e
    
    // /////////////////////////////////////////////////////////////////////////
    // Main U1E Core
-   u1e_core u1e_core(.clk_fpga(clk_fpga), .rst_fpga(~debug_pb),
+   u1e_core u1e_core(.clk_fpga(clk_fpga), .bus_clk(clk_2x), .rst_fpga(~debug_pb),
 		     .debug_led(debug_led), .debug(debug), .debug_clk(debug_clk),
 		     .debug_txd(FPGA_TXD), .debug_rxd(FPGA_RXD),
 		     .EM_CLK(EM_CLK), .EM_D(EM_D), .EM_A(EM_A), .EM_NBE(EM_NBE),
diff --git a/usrp2/top/E1x0/u1e_core.v b/usrp2/top/E1x0/u1e_core.v
index c4fc16444..d481867e3 100644
--- a/usrp2/top/E1x0/u1e_core.v
+++ b/usrp2/top/E1x0/u1e_core.v
@@ -18,7 +18,7 @@
 
 
 module u1e_core
-  (input clk_fpga, input rst_fpga,
+  (input clk_fpga, input bus_clk, input rst_fpga,
    output [3:0] debug_led, output [31:0] debug, output [1:0] debug_clk,
    output debug_txd, input debug_rxd,
    
@@ -117,7 +117,7 @@ module u1e_core
       .in(set_data),.out(),.changed(clear_tx));
 
    gpmc_async #(.TXFIFOSIZE(TXFIFOSIZE), .RXFIFOSIZE(RXFIFOSIZE))
-   gpmc (.arst(wb_rst),
+   gpmc (.arst(wb_rst), .bus_clk(bus_clk),
 	 .EM_CLK(EM_CLK), .EM_D(EM_D), .EM_A(EM_A), .EM_NBE(EM_NBE),
 	 .EM_WAIT0(EM_WAIT0), .EM_NCS4(EM_NCS4), .EM_NCS6(EM_NCS6), .EM_NWE(EM_NWE), 
 	 .EM_NOE(EM_NOE),
diff --git a/usrp2/top/N2x0/Makefile.N200R4 b/usrp2/top/N2x0/Makefile.N200R4
index 955aadc59..0ca40e1bd 100644
--- a/usrp2/top/N2x0/Makefile.N200R4
+++ b/usrp2/top/N2x0/Makefile.N200R4
@@ -45,7 +45,6 @@ simulator "ISE Simulator (VHDL/Verilog)" \
 # Sources
 ##################################################
 TOP_SRCS = \
-rev4_defs.v \
 capture_ddrlvds.v \
 u2plus_core.v \
 u2plus.v \
@@ -67,7 +66,8 @@ SYNTHESIZE_PROPERTIES = \
 "Register Balancing" Yes \
 "Use Clock Enable" Auto \
 "Use Synchronous Reset" Auto \
-"Use Synchronous Set" Auto
+"Use Synchronous Set" Auto \
+"Verilog Macros" "LVDS=1"
 
 TRANSLATE_PROPERTIES = \
 "Macro Search Path" "$(shell pwd)/../../coregen/"
diff --git a/usrp2/top/N2x0/Makefile.N210R4 b/usrp2/top/N2x0/Makefile.N210R4
index 73747e544..01a9e19fd 100644
--- a/usrp2/top/N2x0/Makefile.N210R4
+++ b/usrp2/top/N2x0/Makefile.N210R4
@@ -45,7 +45,6 @@ simulator "ISE Simulator (VHDL/Verilog)" \
 # Sources
 ##################################################
 TOP_SRCS = \
-rev4_defs.v \
 capture_ddrlvds.v \
 u2plus_core.v \
 u2plus.v \
@@ -67,7 +66,8 @@ SYNTHESIZE_PROPERTIES = \
 "Register Balancing" Yes \
 "Use Clock Enable" Auto \
 "Use Synchronous Reset" Auto \
-"Use Synchronous Set" Auto
+"Use Synchronous Set" Auto \
+"Verilog Macros" "LVDS=1"
 
 TRANSLATE_PROPERTIES = \
 "Macro Search Path" "$(shell pwd)/../../coregen/"
diff --git a/usrp2/top/N2x0/rev4_defs.v b/usrp2/top/N2x0/rev4_defs.v
deleted file mode 100644
index f8f6667ac..000000000
--- a/usrp2/top/N2x0/rev4_defs.v
+++ /dev/null
@@ -1,18 +0,0 @@
-//
-// Copyright 2011 Ettus Research LLC
-//
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License
-// along with this program.  If not, see <http://www.gnu.org/licenses/>.
-//
-
-`define LVDS 1