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-rw-r--r--usrp2/top/u2_rev3/u2_core.v6
1 files changed, 5 insertions, 1 deletions
diff --git a/usrp2/top/u2_rev3/u2_core.v b/usrp2/top/u2_rev3/u2_core.v
index c2d473650..30b47b818 100644
--- a/usrp2/top/u2_rev3/u2_core.v
+++ b/usrp2/top/u2_rev3/u2_core.v
@@ -720,9 +720,13 @@ module u2_core
// /////////////////////////////////////////////////////////////////////////
// VITA Timing
+ wire [31:0] debug_sync;
+
time_64bit #(.TICKS_PER_SEC(32'd100000000),.BASE(SR_TIME64)) time_64bit
(.clk(dsp_clk), .rst(dsp_rst), .set_stb(set_stb_dsp), .set_addr(set_addr_dsp), .set_data(set_data_dsp),
- .pps(pps_in), .vita_time(vita_time), .pps_int(pps_int));
+ .pps(pps_in), .vita_time(vita_time), .pps_int(pps_int),
+ .exp_time_in(exp_time_in), .exp_time_out(exp_time_out),
+ .debug(debug_sync));
// /////////////////////////////////////////////////////////////////////////////////////////
// Debug Pins