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-rw-r--r--usrp2/top/u1plus/u1plus.v5
1 files changed, 4 insertions, 1 deletions
diff --git a/usrp2/top/u1plus/u1plus.v b/usrp2/top/u1plus/u1plus.v
index 6ed478420..370d3e4ea 100644
--- a/usrp2/top/u1plus/u1plus.v
+++ b/usrp2/top/u1plus/u1plus.v
@@ -24,9 +24,12 @@ module u1plus
output [13:0] dac, output TXSYNC, output TXBLANK,
input [11:0] adc, input RXSYNC,
- input PPS_IN
+ input PPS_IN,
+ input reset_n, output reset_codec
);
+ assign reset_codec = 1; // Believed to be active low
+
// /////////////////////////////////////////////////////////////////////////
// Clocking
wire clk_fpga, clk_fpga_in, reset;