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-rw-r--r--usrp2/top/u1e/make.sim7
1 files changed, 7 insertions, 0 deletions
diff --git a/usrp2/top/u1e/make.sim b/usrp2/top/u1e/make.sim
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index 000000000..1c163884c
--- /dev/null
+++ b/usrp2/top/u1e/make.sim
@@ -0,0 +1,7 @@
+all: sim
+
+sim:
+ iverilog -Wimplicit -Wportbind -c cmdfile tb_u1e.v -o tb_u1e
+
+clean:
+ rm -f tb_u1e *.vcd *.lxt a.out