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-rw-r--r--usrp2/top/u1e/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/top/u1e/Makefile b/usrp2/top/u1e/Makefile
index 2b78b21bd..a0f921485 100644
--- a/usrp2/top/u1e/Makefile
+++ b/usrp2/top/u1e/Makefile
@@ -54,7 +54,7 @@ simulator "ISE Simulator (VHDL/Verilog)" \
export SOURCE_ROOT := ../../../
export SOURCES := \
control_lib/CRC16_D16.v \
-control_lib/atr_controller.v \
+control_lib/atr_controller16.v \
control_lib/bin2gray.v \
control_lib/dcache.v \
control_lib/decoder_3_8.v \