3 files changed, 6 insertions, 4 deletions
diff --git a/usrp2/gpmc/fifo_watcher.v b/usrp2/gpmc/fifo_watcher.v
index 7a3f00483..4bba142b0 100644
--- a/usrp2/gpmc/fifo_watcher.v
+++ b/usrp2/gpmc/fifo_watcher.v
@@ -10,11 +10,13 @@ module fifo_watcher
    wire   read = src_rdy2 & dst_rdy2 & eof2;
    wire   have_packet_int;
    reg [15:0] counter;
+   wire [4:0] pkt_count;
    
    fifo_short #(.WIDTH(16)) frame_lengths
      (.clk(clk), .reset(reset), .clear(clear),
       .datain(counter), .src_rdy_i(write), .dst_rdy_o(),
-      .dataout(length), .src_rdy_o(have_packet_int), .dst_rdy_i(read) );
+      .dataout(length), .src_rdy_o(have_packet_int), .dst_rdy_i(read),
+      .occupied(pkt_count), .space());
 
    always @(posedge clk)
      if(reset | clear)
@@ -38,7 +40,7 @@ module fifo_watcher
      if(reset | clear)
        have_packet <= 0;
      else 
-       have_packet <= have_packet_int & ~in_packet;
+       have_packet <= (have_packet_int & ~in_packet) | (pkt_count>1) ;
    
    always @(posedge clk)
      if(reset | clear)
diff --git a/usrp2/gpmc/gpmc_async.v b/usrp2/gpmc/gpmc_async.v
index 02a00ce57..dd06478b3 100644
--- a/usrp2/gpmc/gpmc_async.v
+++ b/usrp2/gpmc/gpmc_async.v
@@ -78,7 +78,7 @@ module gpmc_async
       .f36_datain(rx_data_i), .f36_src_rdy_i(rx_src_rdy_i), .f36_dst_rdy_o(rx_dst_rdy_o),
       .f18_dataout(rx18_data), .f18_src_rdy_o(rx18_src_rdy), .f18_dst_rdy_i(rx18_dst_rdy) );
 
-   fifo_cascade #(.WIDTH(18), .SIZE(10)) rx_fifo
+   fifo_cascade #(.WIDTH(18), .SIZE(12)) rx_fifo
      (.clk(fifo_clk), .reset(fifo_rst), .clear(0),
       .datain(rx18_data), .src_rdy_i(rx18_src_rdy), .dst_rdy_o(rx18_dst_rdy), .space(rx_fifo_space),
       .dataout(rx18b_data), .src_rdy_o(rx18b_src_rdy), .dst_rdy_i(rx18b_dst_rdy), .occupied());
diff --git a/usrp2/gpmc/gpmc_to_fifo_async.v b/usrp2/gpmc/gpmc_to_fifo_async.v
index 6232244d4..3d29745a2 100644
--- a/usrp2/gpmc/gpmc_to_fifo_async.v
+++ b/usrp2/gpmc/gpmc_to_fifo_async.v
@@ -57,7 +57,7 @@ module gpmc_to_fifo_async
      if(fifo_rst)
        fifo_ready <= 0;
      else
-       fifo_ready <= first_write & (fifo_space > 16'd1023);
+       fifo_ready <= /* first_write & */ (fifo_space > 16'd1023);
 
    always @(posedge fifo_clk)
      if(fifo_rst)