diff options
Diffstat (limited to 'usrp2/gpmc')
| -rw-r--r-- | usrp2/gpmc/gpmc.v | 6 | ||||
| -rw-r--r-- | usrp2/gpmc/gpmc_wb.v | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/usrp2/gpmc/gpmc.v b/usrp2/gpmc/gpmc.v index d6a685bba..93308a2d2 100644 --- a/usrp2/gpmc/gpmc.v +++ b/usrp2/gpmc/gpmc.v @@ -77,11 +77,11 @@ module gpmc (.wclk(fifo_clk), .datain(rx18_data), .src_rdy_i(rx18_src_rdy), .dst_rdy_o(rx18_dst_rdy), .space(rx_fifo_space), .rclk(EM_CLK), .dataout(rx18b_data), - .src_rdy_o(tx18b_src_rdy), .dst_rdy_i(tx18b_dst_rdy), .occupied(), .arst(arst)); + .src_rdy_o(rx18b_src_rdy), .dst_rdy_i(rx18b_dst_rdy), .occupied(), .arst(arst)); fifo_to_gpmc_sync fifo_to_gpmc_sync (.arst(arst), - .data_i(tx18b_data), .src_rdy_i(tx18b_src_rdy), .dst_rdy_o(tx18b_dst_rdy), + .data_i(rx18b_data), .src_rdy_i(rx18b_src_rdy), .dst_rdy_o(rx18b_dst_rdy), .EM_CLK(EM_CLK), .EM_D(EM_D_fifo), .EM_NCS(EM_NCS4), .EM_NOE(EM_NOE), .fifo_ready(rx_have_data) ); @@ -89,7 +89,7 @@ module gpmc // Control path on CS6 gpmc_wb gpmc_wb - (.EM_CLK(EM_CLK), .EM_D(EM_D_wb), .EM_A(EM_A), .EM_NBE(EM_NBE), + (.EM_CLK(EM_CLK), .EM_D_in(EM_D), .EM_D_out(EM_D_wb), .EM_A(EM_A), .EM_NBE(EM_NBE), .EM_NCS(EM_NCS6), .EM_NWE(EM_NWE), .EM_NOE(EM_NOE), .wb_clk(wb_clk), .wb_rst(wb_rst), .wb_adr_o(wb_adr_o), .wb_dat_mosi(wb_dat_mosi), .wb_dat_miso(wb_dat_miso), diff --git a/usrp2/gpmc/gpmc_wb.v b/usrp2/gpmc/gpmc_wb.v index 64f6a1c00..db6fbc6e9 100644 --- a/usrp2/gpmc/gpmc_wb.v +++ b/usrp2/gpmc/gpmc_wb.v @@ -1,7 +1,7 @@ module gpmc_wb - (input EM_CLK, inout [15:0] EM_D, input [10:1] EM_A, input [1:0] EM_NBE, + (input EM_CLK, input [15:0] EM_D_in, output [15:0] EM_D_out, input [10:1] EM_A, input [1:0] EM_NBE, input EM_NCS, input EM_NWE, input EM_NOE, input wb_clk, input wb_rst, @@ -27,7 +27,7 @@ module gpmc_wb always @(posedge wb_clk) if(we_del == 2'b10) // Falling Edge begin - wb_dat_mosi <= EM_D; + wb_dat_mosi <= EM_D_in; wb_sel_o <= ~EM_NBE; end @@ -37,7 +37,7 @@ module gpmc_wb if(wb_ack_i) EM_D_hold <= wb_dat_miso; - assign EM_D = wb_ack_i ? wb_dat_miso : EM_D_hold; + assign EM_D_out = wb_ack_i ? wb_dat_miso : EM_D_hold; assign wb_cyc_o = wb_stb_o; |