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-rw-r--r--simple_gemac/flow_ctrl_rx.v1
-rw-r--r--simple_gemac/simple_gemac.v3
-rw-r--r--simple_gemac/simple_gemac_rx.v2
-rw-r--r--simple_gemac/simple_gemac_wrapper.v10
4 files changed, 10 insertions, 6 deletions
diff --git a/simple_gemac/flow_ctrl_rx.v b/simple_gemac/flow_ctrl_rx.v
index b13334d0e..d09bf377f 100644
--- a/simple_gemac/flow_ctrl_rx.v
+++ b/simple_gemac/flow_ctrl_rx.v
@@ -42,6 +42,7 @@ module flow_ctrl_rx
countdown <= countdown - 1;
// Cross clock domains
+ wire xon_tx, xoff_tx;
oneshot_2clk send_xon (.clk_in(rx_clk), .in(xon), .clk_out(tx_clk), .out(xon_tx));
oneshot_2clk send_xoff (.clk_in(rx_clk), .in(xoff), .clk_out(tx_clk), .out(xoff_tx));
diff --git a/simple_gemac/simple_gemac.v b/simple_gemac/simple_gemac.v
index 868a66819..e7f327358 100644
--- a/simple_gemac/simple_gemac.v
+++ b/simple_gemac/simple_gemac.v
@@ -26,7 +26,8 @@ module simple_gemac
reset_sync reset_sync_rx (.clk(rx_clk),.reset_in(reset),.reset_out(rst_rxclk));
wire [15:0] pause_quanta_rcvd;
-
+ wire pause_rcvd, pause_apply, paused;
+
simple_gemac_tx simple_gemac_tx
(.clk125(clk125),.reset(rst_txclk),
.GMII_GTX_CLK(GMII_GTX_CLK), .GMII_TX_EN(GMII_TX_EN),
diff --git a/simple_gemac/simple_gemac_rx.v b/simple_gemac/simple_gemac_rx.v
index bad43a607..45ddd6dfa 100644
--- a/simple_gemac/simple_gemac_rx.v
+++ b/simple_gemac/simple_gemac_rx.v
@@ -47,7 +47,7 @@ module simple_gemac_rx
localparam DELAY = 6;
delay_line #(.WIDTH(10)) rx_delay
- (.clk(rx_clk), .delay(DELAY), .din({rx_dv_d1,rx_er_d1,rxd_d1}),.dout({rx_dv_del,rx_er_dl,rxd_del}));
+ (.clk(rx_clk), .delay(DELAY), .din({rx_dv_d1,rx_er_d1,rxd_d1}),.dout({rx_dv_del,rx_er_del,rxd_del}));
always @(posedge rx_clk)
if(reset)
diff --git a/simple_gemac/simple_gemac_wrapper.v b/simple_gemac/simple_gemac_wrapper.v
index 71ad0cf0f..efcf89276 100644
--- a/simple_gemac/simple_gemac_wrapper.v
+++ b/simple_gemac/simple_gemac_wrapper.v
@@ -19,13 +19,15 @@ module simple_gemac_wrapper
// MIIM
inout mdio, output mdc,
output [31:0] debug);
-
+
+ wire clear = 0;
wire [7:0] rx_data, tx_data;
wire tx_clk, tx_valid, tx_error, tx_ack;
wire rx_clk, rx_valid, rx_error, rx_ack;
wire [47:0] ucast_addr, mcast_addr;
wire pass_ucast, pass_mcast, pass_bcast, pass_pause, pass_all;
+ wire pause_req;
wire pause_request_en, pause_respect_en;
wire [15:0] pause_time, pause_thresh, pause_time_req, rx_fifo_space;
@@ -75,15 +77,15 @@ module simple_gemac_wrapper
rxmac_to_ll8 rx_adapt
(.clk(rx_clk), .reset(rx_reset), .clear(0),
.rx_data(rx_data), .rx_valid(rx_valid), .rx_error(rx_error), .rx_ack(rx_ack),
- .ll_data(rx_ll_data), .ll_sof(rx_ll_sof), .ll_eof(rx_ll_eof), .ll_error(rx_ll_error),
+ .ll_data(rx_ll_data), .ll_sof(rx_ll_sof), .ll_eof(rx_ll_eof), .ll_error(), // error also encoded in sof/eof
.ll_src_rdy(rx_ll_src_rdy), .ll_dst_rdy(rx_ll_dst_rdy));
ll8_shortfifo rx_sfifo
(.clk(rx_clk), .reset(rx_reset), .clear(0),
.datain(rx_ll_data), .sof_i(rx_ll_sof), .eof_i(rx_ll_eof),
- .error_i(rx_ll_error), .src_rdy_i(rx_ll_src_rdy), .dst_rdy_o(rx_ll_dst_rdy),
+ .error_i(0), .src_rdy_i(rx_ll_src_rdy), .dst_rdy_o(rx_ll_dst_rdy),
.dataout(rx_ll_data2), .sof_o(rx_ll_sof2), .eof_o(rx_ll_eof2),
- .error_o(rx_ll_error2), .src_rdy_o(rx_ll_src_rdy2), .dst_rdy_i(rx_ll_dst_rdy2));
+ .error_o(), .src_rdy_o(rx_ll_src_rdy2), .dst_rdy_i(rx_ll_dst_rdy2));
assign rx_ll_dst_rdy2 = ~rx_ll_dst_rdy2_n;
assign rx_ll_src_rdy2_n = ~rx_ll_src_rdy2;