diff options
Diffstat (limited to 'mpm/include')
| -rw-r--r-- | mpm/include/mpm/CMakeLists.txt | 4 | ||||
| -rw-r--r-- | mpm/include/mpm/ad9361/CMakeLists.txt | 12 | ||||
| -rw-r--r-- | mpm/include/mpm/ad9361/ad9361_ctrl.hpp | 69 | ||||
| -rw-r--r-- | mpm/include/mpm/ad9361/e320_defaults.hpp | 45 | ||||
| -rw-r--r-- | mpm/include/mpm/dboards/CMakeLists.txt | 19 | ||||
| -rw-r--r-- | mpm/include/mpm/dboards/neon_manager.hpp | 40 |
6 files changed, 182 insertions, 7 deletions
diff --git a/mpm/include/mpm/CMakeLists.txt b/mpm/include/mpm/CMakeLists.txt index e69d85ef2..44ea1dedb 100644 --- a/mpm/include/mpm/CMakeLists.txt +++ b/mpm/include/mpm/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright 2017 Ettus Research, National Instruments Company +# Copyright 2017-2018 Ettus Research, a National Instruments Company # # SPDX-License-Identifier: GPL-3.0 # @@ -11,6 +11,8 @@ INSTALL(FILES IF(ENABLE_MYKONOS) ADD_SUBDIRECTORY(ad937x) +ELSEIF(ENABLE_E320) + ADD_SUBDIRECTORY(ad9361) ENDIF(ENABLE_MYKONOS) ADD_SUBDIRECTORY(chips) diff --git a/mpm/include/mpm/ad9361/CMakeLists.txt b/mpm/include/mpm/ad9361/CMakeLists.txt new file mode 100644 index 000000000..a3f23de05 --- /dev/null +++ b/mpm/include/mpm/ad9361/CMakeLists.txt @@ -0,0 +1,12 @@ +# +# Copyright 2018 Ettus Research, a National Instruments Company +# +# SPDX-License-Identifier: GPL-3.0-or-later +# + + +INSTALL(FILES + ad9361_ctrl.hpp + e320_defaults.hpp + DESTINATION ${INCLUDE_DIR}/mpm/catalina +) diff --git a/mpm/include/mpm/ad9361/ad9361_ctrl.hpp b/mpm/include/mpm/ad9361/ad9361_ctrl.hpp new file mode 100644 index 000000000..f79502add --- /dev/null +++ b/mpm/include/mpm/ad9361/ad9361_ctrl.hpp @@ -0,0 +1,69 @@ +// +// Copyright 2018 Ettus Research, a National Instruments Company +// +// SPDX-License-Identifier: GPL-3.0-or-later +// + +#pragma once + +// Relative to uhd/host/lib/usrp/common/ad9361_driver/ +#include "../../../include/uhdlib/usrp/common/ad9361_ctrl.hpp" + +#include <boost/make_shared.hpp> +#include <boost/noncopyable.hpp> + +#include <functional> +#include <string> +#include <vector> + +namespace mpm { namespace chips { + using uhd::usrp::ad9361_ctrl; +}}; + +//TODO: pull in filter_info_base +#ifdef LIBMPM_PYTHON +void export_catalina(){ + LIBMPM_BOOST_PREAMBLE("ad9361") + using namespace mpm::chips; + bp::class_<ad9361_ctrl, boost::noncopyable, boost::shared_ptr<ad9361_ctrl>>("ad9361_ctrl", bp::no_init) + .def("get_gain_names", &ad9361_ctrl::get_gain_names) + .staticmethod("get_gain_names") + // Make this "Python private" because the return value can't be serialized + .def("_get_gain_range", &ad9361_ctrl::get_gain_range) + .staticmethod("_get_gain_range") + .def("get_rf_freq_range", &ad9361_ctrl::get_rf_freq_range) + .staticmethod("get_rf_freq_range") + .def("get_bw_filter_range", &ad9361_ctrl::get_bw_filter_range) + .staticmethod("get_bw_filter_range") + .def("get_clock_rate_range", &ad9361_ctrl::get_clock_rate_range) + .staticmethod("get_clock_rate_range") + .def("set_bw_filter", &ad9361_ctrl::set_bw_filter) + .def("set_gain", &ad9361_ctrl::set_gain) + .def("set_agc", &ad9361_ctrl::set_agc) + .def("set_agc_mode", &ad9361_ctrl::set_agc_mode) + .def("set_clock_rate", &ad9361_ctrl::set_clock_rate) + .def("set_active_chains", &ad9361_ctrl::set_active_chains) + .def("set_timing_mode", &ad9361_ctrl::set_timing_mode) + .def("tune", &ad9361_ctrl::tune) + .def("set_dc_offset", &ad9361_ctrl::set_dc_offset) + .def("set_dc_offset_auto", &ad9361_ctrl::set_dc_offset_auto) + .def("set_iq_balance", &ad9361_ctrl::set_iq_balance) + .def("set_iq_balance_auto", &ad9361_ctrl::set_iq_balance_auto) + .def("get_freq", &ad9361_ctrl::get_freq) + .def("data_port_loopback", &ad9361_ctrl::data_port_loopback) + .def("get_rssi", +[](ad9361_ctrl& self, std::string which) { + return self.get_rssi(which).to_real(); + }) + .def("get_temperature", +[](ad9361_ctrl& self) { + return self.get_temperature().to_real(); + }) + .def("get_filter_names", &ad9361_ctrl::get_filter_names) + // Make this "Python private" because the return value can't be serialized. + .def("_get_filter", &ad9361_ctrl::get_filter) + .def("set_filter", &ad9361_ctrl::set_filter) + .def("output_digital_test_tone", &ad9361_ctrl::output_digital_test_tone) + ; +} + +#endif + diff --git a/mpm/include/mpm/ad9361/e320_defaults.hpp b/mpm/include/mpm/ad9361/e320_defaults.hpp new file mode 100644 index 000000000..558aed375 --- /dev/null +++ b/mpm/include/mpm/ad9361/e320_defaults.hpp @@ -0,0 +1,45 @@ +// +// Copyright 2018 Ettus Research, a National Instruments Company +// +// SPDX-License-Identifier: GPL-3.0-or-later +// + +#ifndef INCLUDED_E320_DEFAULTS_HPP +#define INCLUDED_E320_DEFAULTS_HPP + +#include "ad9361_ctrl.hpp" + +namespace mpm { namespace types { namespace e320 { + +using namespace uhd::usrp; + +class e320_ad9361_client_t : public uhd::usrp::ad9361_params { +public: + ~e320_ad9361_client_t() {} + double get_band_edge(frequency_band_t band) { + switch (band) { + case AD9361_RX_BAND0: return 0.0; + case AD9361_RX_BAND1: return 2.6e9; + case AD9361_TX_BAND0: return 2940.0e6; + default: return 0; + } + } + clocking_mode_t get_clocking_mode() { + return clocking_mode_t::AD9361_XTAL_N_CLK_PATH; + } + digital_interface_mode_t get_digital_interface_mode() { + return AD9361_DDR_FDD_LVDS; + } + digital_interface_delays_t get_digital_interface_timing() { + digital_interface_delays_t delays; + delays.rx_clk_delay = 0; + delays.rx_data_delay = 0; + delays.tx_clk_delay = 0; + delays.tx_data_delay = 0; + return delays; + } +}; + +}}} // namespace + +#endif // INCLUDED_E320_DEFAULTS_HPP diff --git a/mpm/include/mpm/dboards/CMakeLists.txt b/mpm/include/mpm/dboards/CMakeLists.txt index 3d3db8ead..6b95e8ebb 100644 --- a/mpm/include/mpm/dboards/CMakeLists.txt +++ b/mpm/include/mpm/dboards/CMakeLists.txt @@ -1,9 +1,16 @@ # -# Copyright 2017 Ettus Research, National Instruments Company +# Copyright 2018 Ettus Research, a National Instruments Company # -# SPDX-License-Identifier: GPL-3.0 +# SPDX-License-Identifier: GPL-3.0-or-later # -INSTALL(FILES - magnesium_manager.hpp - DESTINATION ${INCLUDE_DIR}/mpm/dboards -) +IF(ENABLE_MAGNESIUM) + INSTALL(FILES + magnesium_manager.hpp + DESTINATION ${INCLUDE_DIR}/mpm/dboards + ) +ELSEIF(ENABLE_E320) + INSTALL(FILES + neon_manager.hpp + DESTINATION ${INCLUDE_DIR}/mpm/dboards + ) +ENDIF(ENABLE_MAGNESIUM) diff --git a/mpm/include/mpm/dboards/neon_manager.hpp b/mpm/include/mpm/dboards/neon_manager.hpp new file mode 100644 index 000000000..706dbe7c4 --- /dev/null +++ b/mpm/include/mpm/dboards/neon_manager.hpp @@ -0,0 +1,40 @@ +// +// Copyright 2018 Ettus Research, a National Instruments Company +// +// SPDX-License-Identifier: GPL-3.0-or-later +// + +#pragma once + +#include <mpm/ad9361/ad9361_ctrl.hpp> +#include <mpm/types/lockable.hpp> +#include <mpm/types/regs_iface.hpp> +#include <boost/shared_ptr.hpp> +#include <memory> +#include <mutex> + +namespace mpm { namespace dboards { + class neon_manager// : public dboard_periph_manager + { + public: + neon_manager(const std::string &catalina_spidev); + + /*! Return a reference to the radio chip controls + */ + mpm::chips::ad9361_ctrl::sptr get_radio_ctrl(){ return _catalina_ctrl; } + + private: + mpm::chips::ad9361_ctrl::sptr _catalina_ctrl; + }; + +}}; /* namespace mpm::dboards */ + +#ifdef LIBMPM_PYTHON +void export_neon(){ + LIBMPM_BOOST_PREAMBLE("dboards") + using namespace mpm::dboards; + bp::class_<mpm::dboards::neon_manager>("neon_manager", bp::init<std::string>()) + .def("get_radio_ctrl", &mpm::dboards::neon_manager::get_radio_ctrl) + ; +} +#endif |