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-rw-r--r--images/image_package_mapping.py24
1 files changed, 24 insertions, 0 deletions
diff --git a/images/image_package_mapping.py b/images/image_package_mapping.py
index fa18c0d6f..6f0d31a05 100644
--- a/images/image_package_mapping.py
+++ b/images/image_package_mapping.py
@@ -105,6 +105,30 @@ PACKAGE_MAPPING = {
'usrp_n300_fpga_WX.dts.md5',
'usrp_n300_fpga_WX.rpt',],
},
+ "n320": {
+ "type": "n3xx",
+ "package_name": "n3xx_n320_fpga_default-g{}.zip",
+ "files": ['usrp_n320_fpga_HG.bit',
+ 'usrp_n320_fpga_HG.bit.md5',
+ 'usrp_n320_fpga_HG.dts',
+ 'usrp_n320_fpga_HG.dts.md5',
+ 'usrp_n320_fpga_HG.rpt',
+ 'usrp_n320_fpga_XG.bit',
+ 'usrp_n320_fpga_XG.bit.md5',
+ 'usrp_n320_fpga_XG.dts',
+ 'usrp_n320_fpga_XG.dts.md5',
+ 'usrp_n320_fpga_XG.rpt',
+ 'usrp_n320_fpga_XQ.bit',
+ 'usrp_n320_fpga_XQ.bit.md5',
+ 'usrp_n320_fpga_XQ.dts',
+ 'usrp_n320_fpga_XQ.dts.md5',
+ 'usrp_n320_fpga_XQ.rpt',
+ 'usrp_n320_fpga_AQ.bit',
+ 'usrp_n320_fpga_AQ.bit.md5',
+ 'usrp_n320_fpga_AQ.dts',
+ 'usrp_n320_fpga_AQ.dts.md5',
+ 'usrp_n320_fpga_AQ.rpt',],
+ },
"n310_aa": {
"type": "n3xx",
"package_name": "n3xx_n310_fpga_aurora-g{}.zip",