diff options
Diffstat (limited to 'host')
24 files changed, 676 insertions, 275 deletions
| diff --git a/host/include/uhd/usrp/dboard_iface.hpp b/host/include/uhd/usrp/dboard_iface.hpp index f8f318a40..c3a3a4e00 100644 --- a/host/include/uhd/usrp/dboard_iface.hpp +++ b/host/include/uhd/usrp/dboard_iface.hpp @@ -22,6 +22,7 @@  #include <uhd/utils/pimpl.hpp>  #include <uhd/types/serial.hpp>  #include <uhd/types/time_spec.hpp> +#include <uhd/usrp/gpio_defs.hpp>  #include <boost/shared_ptr.hpp>  #include <boost/cstdint.hpp>  #include <string> @@ -67,14 +68,6 @@ public:          UNIT_TX = int('t')      }; -    //! possible atr registers -    enum atr_reg_t{ -        ATR_REG_IDLE        = int('i'), -        ATR_REG_TX_ONLY     = int('t'), -        ATR_REG_RX_ONLY     = int('r'), -        ATR_REG_FULL_DUPLEX = int('f') -    }; -      //! aux dac selection enums (per unit)      enum aux_dac_t{          AUX_DAC_A = int('a'), @@ -89,6 +82,8 @@ public:          AUX_ADC_B = int('b')      }; +    typedef uhd::usrp::gpio_atr::gpio_atr_reg_t atr_reg_t; +      /*!       * Get special properties information for this dboard slot.       * This call helps the dboard code to handle implementation diff --git a/host/include/uhd/usrp/gpio_defs.hpp b/host/include/uhd/usrp/gpio_defs.hpp new file mode 100644 index 000000000..c32f22f28 --- /dev/null +++ b/host/include/uhd/usrp/gpio_defs.hpp @@ -0,0 +1,70 @@ +// +// Copyright 2011,2014,2015 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program.  If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_LIBUHD_USRP_GPIO_DEFS_HPP +#define INCLUDED_LIBUHD_USRP_GPIO_DEFS_HPP + +#include <uhd/config.hpp> +#include <boost/assign.hpp> +#include <boost/utility.hpp> +#include <map> + +namespace uhd { namespace usrp { namespace gpio_atr { + +enum gpio_atr_reg_t { +    ATR_REG_IDLE        = int('i'), +    ATR_REG_TX_ONLY     = int('t'), +    ATR_REG_RX_ONLY     = int('r'), +    ATR_REG_FULL_DUPLEX = int('f') +}; + +enum gpio_atr_mode_t { +    MODE_ATR  = 0,   //Output driven by the auto-transmit-receive engine +    MODE_GPIO = 1    //Output value is static +}; + +enum gpio_ddr_t { +    DDR_INPUT   = 0, +    DDR_OUTPUT  = 1 +}; + +enum gpio_attr_t { +    GPIO_CTRL, +    GPIO_DDR, +    GPIO_OUT, +    GPIO_ATR_0X, +    GPIO_ATR_RX, +    GPIO_ATR_TX, +    GPIO_ATR_XX +}; + +typedef std::map<gpio_attr_t, std::string> gpio_attr_map_t; + +static const gpio_attr_map_t gpio_attr_map = +    boost::assign::map_list_of +        (GPIO_CTRL,   "CTRL") +        (GPIO_DDR,    "DDR") +        (GPIO_OUT,    "OUT") +        (GPIO_ATR_0X, "ATR_0X") +        (GPIO_ATR_RX, "ATR_RX") +        (GPIO_ATR_TX, "ATR_TX") +        (GPIO_ATR_XX, "ATR_XX") +; + +}}} //namespaces + +#endif /* INCLUDED_LIBUHD_USRP_GPIO_DEFS_HPP */ diff --git a/host/include/uhd/utils/soft_register.hpp b/host/include/uhd/utils/soft_register.hpp index a2c34a4ec..665876e73 100644 --- a/host/include/uhd/utils/soft_register.hpp +++ b/host/include/uhd/utils/soft_register.hpp @@ -223,7 +223,7 @@ public:                  _soft_copy.mark_clean();              }          } else { -            throw uhd::not_implemented_error("soft_register is not writable."); +            throw uhd::not_implemented_error("soft_register is not writable or uninitialized.");          }      } @@ -244,7 +244,7 @@ public:              }              _soft_copy.mark_clean();          } else { -            throw uhd::not_implemented_error("soft_register is not readable."); +            throw uhd::not_implemented_error("soft_register is not readable or uninitialized.");          }      } diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp index 1d102c7f0..360dc39b9 100644 --- a/host/lib/usrp/b200/b200_impl.cpp +++ b/host/lib/usrp/b200/b200_impl.cpp @@ -41,6 +41,7 @@  using namespace uhd;  using namespace uhd::usrp; +using namespace uhd::usrp::gpio_atr;  using namespace uhd::transport;  static const boost::posix_time::milliseconds REENUMERATION_TIMEOUT_MS(3000); @@ -656,15 +657,15 @@ b200_impl::b200_impl(const uhd::device_addr_t& device_addr, usb_device_handle::s      ////////////////////////////////////////////////////////////////////      // front panel gpio      //////////////////////////////////////////////////////////////////// -    _radio_perifs[0].fp_gpio = gpio_core_200::make(_radio_perifs[0].ctrl, TOREG(SR_FP_GPIO), RB32_FP_GPIO); +    _radio_perifs[0].fp_gpio = gpio_atr_3000::make(_radio_perifs[0].ctrl, TOREG(SR_FP_GPIO), RB32_FP_GPIO);      BOOST_FOREACH(const gpio_attr_map_t::value_type attr, gpio_attr_map)      {              _tree->create<boost::uint32_t>(mb_path / "gpio" / "FP0" / attr.second)              .set(0) -            .subscribe(boost::bind(&b200_impl::set_fp_gpio, this, _radio_perifs[0].fp_gpio, attr.first, _1)); +            .subscribe(boost::bind(&gpio_atr_3000::set_gpio_attr, _radio_perifs[0].fp_gpio, attr.first, _1));      }      _tree->create<boost::uint32_t>(mb_path / "gpio" / "FP0" / "READBACK") -        .publish(boost::bind(&b200_impl::get_fp_gpio, this, _radio_perifs[0].fp_gpio)); +        .publish(boost::bind(&gpio_atr_3000::read_gpio, _radio_perifs[0].fp_gpio));      ////////////////////////////////////////////////////////////////////      // dboard eeproms but not really @@ -751,7 +752,8 @@ void b200_impl::setup_radio(const size_t dspno)      ////////////////////////////////////////////////////////////////////      // Set up peripherals      //////////////////////////////////////////////////////////////////// -    perif.atr = gpio_core_200_32wo::make(perif.ctrl, TOREG(SR_ATR)); +    perif.atr = gpio_atr_3000::make_write_only(perif.ctrl, TOREG(SR_ATR)); +    perif.atr->set_atr_mode(MODE_ATR, 0xFFFFFFFF);      // create rx dsp control objects      perif.framer = rx_vita_core_3000::make(perif.ctrl, TOREG(SR_RX_CTRL));      perif.ddc = rx_dsp_core_3000::make(perif.ctrl, TOREG(SR_RX_DSP), true /*is_b200?*/); @@ -962,27 +964,6 @@ void b200_impl::set_mb_eeprom(const uhd::usrp::mboard_eeprom_t &mb_eeprom)      mb_eeprom.commit(*_iface, "B200");  } - -boost::uint32_t b200_impl::get_fp_gpio(gpio_core_200::sptr gpio) -{ -    return boost::uint32_t(gpio->read_gpio(dboard_iface::UNIT_RX)); -} - -void b200_impl::set_fp_gpio(gpio_core_200::sptr gpio, const gpio_attr_t attr, const boost::uint32_t value) -{ -    switch (attr) -    { -    case GPIO_CTRL:   return gpio->set_pin_ctrl(dboard_iface::UNIT_RX, value); -    case GPIO_DDR:    return gpio->set_gpio_ddr(dboard_iface::UNIT_RX, value); -    case GPIO_OUT:    return gpio->set_gpio_out(dboard_iface::UNIT_RX, value); -    case GPIO_ATR_0X: return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, value); -    case GPIO_ATR_RX: return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, value); -    case GPIO_ATR_TX: return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, value); -    case GPIO_ATR_XX: return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, value); -    default:        UHD_THROW_INVALID_CODE_PATH(); -    } -} -  /***********************************************************************   * Reference time and clock   **********************************************************************/ @@ -1152,11 +1133,11 @@ void b200_impl::update_atrs(void)          if (enb_rx and enb_tx) fd = STATE_FDX1_TXRX;          if (enb_rx and not enb_tx) fd = rxonly;          if (not enb_rx and enb_tx) fd = txonly; -        gpio_core_200_32wo::sptr atr = perif.atr; -        atr->set_atr_reg(dboard_iface::ATR_REG_IDLE, STATE_OFF); -        atr->set_atr_reg(dboard_iface::ATR_REG_RX_ONLY, rxonly); -        atr->set_atr_reg(dboard_iface::ATR_REG_TX_ONLY, txonly); -        atr->set_atr_reg(dboard_iface::ATR_REG_FULL_DUPLEX, fd); +        gpio_atr_3000::sptr atr = perif.atr; +        atr->set_atr_reg(ATR_REG_IDLE, STATE_OFF); +        atr->set_atr_reg(ATR_REG_RX_ONLY, rxonly); +        atr->set_atr_reg(ATR_REG_TX_ONLY, txonly); +        atr->set_atr_reg(ATR_REG_FULL_DUPLEX, fd);      }      if (_radio_perifs.size() > _fe2 and _radio_perifs[_fe2].atr)      { @@ -1170,11 +1151,11 @@ void b200_impl::update_atrs(void)          if (enb_rx and enb_tx) fd = STATE_FDX2_TXRX;          if (enb_rx and not enb_tx) fd = rxonly;          if (not enb_rx and enb_tx) fd = txonly; -        gpio_core_200_32wo::sptr atr = perif.atr; -        atr->set_atr_reg(dboard_iface::ATR_REG_IDLE, STATE_OFF); -        atr->set_atr_reg(dboard_iface::ATR_REG_RX_ONLY, rxonly); -        atr->set_atr_reg(dboard_iface::ATR_REG_TX_ONLY, txonly); -        atr->set_atr_reg(dboard_iface::ATR_REG_FULL_DUPLEX, fd); +        gpio_atr_3000::sptr atr = perif.atr; +        atr->set_atr_reg(ATR_REG_IDLE, STATE_OFF); +        atr->set_atr_reg(ATR_REG_RX_ONLY, rxonly); +        atr->set_atr_reg(ATR_REG_TX_ONLY, txonly); +        atr->set_atr_reg(ATR_REG_FULL_DUPLEX, fd);      }  } diff --git a/host/lib/usrp/b200/b200_impl.hpp b/host/lib/usrp/b200/b200_impl.hpp index 25fef7d4b..b05f81a36 100644 --- a/host/lib/usrp/b200/b200_impl.hpp +++ b/host/lib/usrp/b200/b200_impl.hpp @@ -27,7 +27,7 @@  #include "rx_vita_core_3000.hpp"  #include "tx_vita_core_3000.hpp"  #include "time_core_3000.hpp" -#include "gpio_core_200.hpp" +#include "gpio_atr_3000.hpp"  #include "radio_ctrl_core_3000.hpp"  #include "rx_dsp_core_3000.hpp"  #include "tx_dsp_core_3000.hpp" @@ -177,8 +177,8 @@ private:      struct radio_perifs_t      {          radio_ctrl_core_3000::sptr ctrl; -        gpio_core_200_32wo::sptr atr; -        gpio_core_200::sptr fp_gpio; +        uhd::usrp::gpio_atr::gpio_atr_3000::sptr atr; +        uhd::usrp::gpio_atr::gpio_atr_3000::sptr fp_gpio;          time_core_3000::sptr time64;          rx_vita_core_3000::sptr framer;          rx_dsp_core_3000::sptr ddc; @@ -226,9 +226,6 @@ private:      void update_enables(void);      void update_atrs(void); -    boost::uint32_t get_fp_gpio(gpio_core_200::sptr); -    void set_fp_gpio(gpio_core_200::sptr, const gpio_attr_t, const boost::uint32_t); -      double _tick_rate;      double get_tick_rate(void){return _tick_rate;}      double set_tick_rate(const double rate); diff --git a/host/lib/usrp/cores/CMakeLists.txt b/host/lib/usrp/cores/CMakeLists.txt index f28ae040f..909c02941 100644 --- a/host/lib/usrp/cores/CMakeLists.txt +++ b/host/lib/usrp/cores/CMakeLists.txt @@ -40,4 +40,5 @@ LIBUHD_APPEND_SOURCES(      ${CMAKE_CURRENT_SOURCE_DIR}/rx_dsp_core_3000.cpp      ${CMAKE_CURRENT_SOURCE_DIR}/tx_dsp_core_3000.cpp      ${CMAKE_CURRENT_SOURCE_DIR}/radio_ctrl_core_3000.cpp +    ${CMAKE_CURRENT_SOURCE_DIR}/gpio_atr_3000.cpp  ) diff --git a/host/lib/usrp/cores/gpio_atr_3000.cpp b/host/lib/usrp/cores/gpio_atr_3000.cpp new file mode 100644 index 000000000..7f48abc69 --- /dev/null +++ b/host/lib/usrp/cores/gpio_atr_3000.cpp @@ -0,0 +1,263 @@ +// +// Copyright 2011,2014 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program.  If not, see <http://www.gnu.org/licenses/>. +// + +#include "gpio_atr_3000.hpp" +#include <uhd/types/dict.hpp> +#include <uhd/utils/soft_register.hpp> + +using namespace uhd; +using namespace usrp; + +//------------------------------------------------------------- +// gpio_atr_3000 +//------------------------------------------------------------- + +#define REG_ATR_IDLE_OFFSET     (base + 0) +#define REG_ATR_RX_OFFSET       (base + 4) +#define REG_ATR_TX_OFFSET       (base + 8) +#define REG_ATR_FDX_OFFSET      (base + 12) +#define REG_DDR_OFFSET          (base + 16) +#define REG_ATR_DISABLE_OFFSET  (base + 20) + +namespace uhd { namespace usrp { namespace gpio_atr { + +class gpio_atr_3000_impl : public gpio_atr_3000{ +public: +    gpio_atr_3000_impl( +        wb_iface::sptr iface, +        const wb_iface::wb_addr_type base, +        const wb_iface::wb_addr_type rb_addr = READBACK_DISABLED +    ): +        _iface(iface), _rb_addr(rb_addr), +        _atr_idle_reg(REG_ATR_IDLE_OFFSET), +        _atr_rx_reg(REG_ATR_RX_OFFSET), +        _atr_tx_reg(REG_ATR_TX_OFFSET), +        _atr_fdx_reg(REG_ATR_FDX_OFFSET), +        _ddr_reg(REG_DDR_OFFSET), +        _atr_disable_reg(REG_ATR_DISABLE_OFFSET) +    { +        _atr_idle_reg.initialize(*_iface, true); +        _atr_rx_reg.initialize(*_iface, true); +        _atr_tx_reg.initialize(*_iface, true); +        _atr_fdx_reg.initialize(*_iface, true); +        _ddr_reg.initialize(*_iface, true); +        _atr_disable_reg.initialize(*_iface, true); +    } + +    virtual void set_atr_mode(const gpio_atr_mode_t mode, const boost::uint32_t mask) +    { +        //Each bit in the "ATR Disable" register determines whether the respective bit in the GPIO +        //output bus is driven by the ATR engine or a static register. +        //For each bit position, a 1 means that the bit is static and 0 means that the bit +        //is driven by the ATR state machine. +        //This setting will only get applied to all bits in the "mask" that are 1. All other +        //bits will retain their old value. +        _atr_disable_reg.set_with_mask((mode==MODE_ATR) ? ~MASK_SET_ALL : MASK_SET_ALL, mask); +        _atr_disable_reg.flush(); +    } + +    virtual void set_gpio_ddr(const gpio_ddr_t dir, const boost::uint32_t mask) +    { +        //Each bit in the "DDR" register determines whether the respective bit in the GPIO +        //bus is an input or an output. +        //For each bit position, a 1 means that the bit is an output and 0 means that the bit +        //is an input. +        //This setting will only get applied to all bits in the "mask" that are 1. All other +        //bits will retain their old value. +        _ddr_reg.set_with_mask((dir==DDR_INPUT) ? ~MASK_SET_ALL : MASK_SET_ALL, mask); +        _ddr_reg.flush(); +    } + +    virtual void set_atr_reg(const gpio_atr_reg_t atr, const boost::uint32_t value, const boost::uint32_t mask = MASK_SET_ALL) +    { +        //Set the value of the specified ATR register. For bits with ATR Disable set to 1, +        //the IDLE register will hold the output state +        //This setting will only get applied to all bits in the "mask" that are 1. All other +        //bits will retain their old value. +        masked_reg_t* reg = NULL; +        switch (atr) { +            case ATR_REG_IDLE:          reg = &_atr_idle_reg; break; +            case ATR_REG_RX_ONLY:       reg = &_atr_rx_reg;   break; +            case ATR_REG_TX_ONLY:       reg = &_atr_tx_reg;   break; +            case ATR_REG_FULL_DUPLEX:   reg = &_atr_fdx_reg;  break; +            default:                    reg = &_atr_idle_reg; break; +        } +        //For protection we only write to bits that have the mode ATR by masking the user +        //specified "mask" with ~atr_disable. +        reg->set_with_mask(value, mask & (~_atr_disable_reg.get(masked_reg_t::REGISTER))); +        reg->flush(); +    } + +    virtual void set_gpio_out(const boost::uint32_t value, const boost::uint32_t mask = MASK_SET_ALL) { +        //Set the value of the specified GPIO output register. +        //This setting will only get applied to all bits in the "mask" that are 1. All other +        //bits will retain their old value. + +        //For protection we only write to bits that have the mode GPIO by masking the user +        //specified "mask" with atr_disable. +        _atr_idle_reg.set_with_mask(value, mask & _atr_disable_reg.get(masked_reg_t::REGISTER)); +        _atr_idle_reg.flush(); +    } + +    virtual boost::uint32_t read_gpio() +    { +        //Read the state of the GPIO pins +        //If a pin is configured as an input, reads the actual value of the pin +        //If a pin is configured as an output, reads the last value written to the pin +        if (_rb_addr != READBACK_DISABLED) { +            return _iface->peek32(_rb_addr); +        } else { +            throw uhd::runtime_error("read_gpio not supported for write-only interface."); +        } +    } + +    inline virtual void set_gpio_attr(const gpio_attr_t attr, const boost::uint32_t value) +    { +        //An attribute based API to configure all settings for the GPIO bus in one function +        //call. This API does not have a mask so it configures all bits at the same time. +        switch (attr) +        { +        case GPIO_CTRL: +            set_atr_mode(MODE_ATR, value);   //Configure mode=ATR for all bits that are set +            set_atr_mode(MODE_GPIO, ~value); //Configure mode=GPIO for all bits that are unset +            break; +        case GPIO_DDR: +            set_gpio_ddr(DDR_OUTPUT, value); //Configure as output for all bits that are set +            set_gpio_ddr(DDR_INPUT, ~value); //Configure as input for all bits that are unset +            break; +        case GPIO_OUT: +            //Only set bits that are driven statically +            set_atr_reg(ATR_REG_IDLE, value); +            break; +        case GPIO_ATR_0X: +            //Only set bits that are driven by the ATR engine +            set_atr_reg(ATR_REG_IDLE, value); +            break; +        case GPIO_ATR_RX: +            //Only set bits that are driven by the ATR engine +            set_atr_reg(ATR_REG_RX_ONLY, value); +            break; +        case GPIO_ATR_TX: +            //Only set bits that are driven by the ATR engine +            set_atr_reg(ATR_REG_TX_ONLY, value); +            break; +        case GPIO_ATR_XX: +            //Only set bits that are driven by the ATR engine +            set_atr_reg(ATR_REG_FULL_DUPLEX, value); +            break; +        default: +            UHD_THROW_INVALID_CODE_PATH(); +        } +    } + +protected: +    //Special RB addr value to indicate no readback +    //This value is invalid as a real address because it is not a multiple of 4 +    static const wb_iface::wb_addr_type READBACK_DISABLED = 0xFFFFFFFF; + +    class masked_reg_t : public uhd::soft_reg32_wo_t { +    public: +        masked_reg_t(const wb_iface::wb_addr_type offset): uhd::soft_reg32_wo_t(offset) { +            set(REGISTER, 0); +        } + +        inline void set_with_mask(const boost::uint32_t value, const boost::uint32_t mask) { +            set(REGISTER, (value&mask)|(get(REGISTER)&(~mask))); +        } +    }; + +    wb_iface::sptr          _iface; +    wb_iface::wb_addr_type  _rb_addr; +    masked_reg_t            _atr_idle_reg; +    masked_reg_t            _atr_rx_reg; +    masked_reg_t            _atr_tx_reg; +    masked_reg_t            _atr_fdx_reg; +    masked_reg_t            _ddr_reg; +    masked_reg_t            _atr_disable_reg; +}; + +gpio_atr_3000::sptr gpio_atr_3000::make( +    wb_iface::sptr iface, const wb_iface::wb_addr_type base, const wb_iface::wb_addr_type rb_addr +) { +    return sptr(new gpio_atr_3000_impl(iface, base, rb_addr)); +} + +gpio_atr_3000::sptr gpio_atr_3000::make_write_only( +    wb_iface::sptr iface, const wb_iface::wb_addr_type base +) { +    gpio_atr_3000::sptr gpio_iface(new gpio_atr_3000_impl(iface, base)); +    gpio_iface->set_gpio_ddr(DDR_OUTPUT, MASK_SET_ALL); +    return gpio_iface; +} + +//------------------------------------------------------------- +// db_gpio_atr_3000 +//------------------------------------------------------------- + +class db_gpio_atr_3000_impl : public gpio_atr_3000_impl, public db_gpio_atr_3000 { +public: +    db_gpio_atr_3000_impl(wb_iface::sptr iface, const wb_iface::wb_addr_type base, const wb_iface::wb_addr_type rb_addr): +        gpio_atr_3000_impl(iface, base, rb_addr) { /* NOP */ } + +    inline void set_pin_ctrl(const db_unit_t unit, const boost::uint16_t value) +    { +        gpio_atr_3000_impl::set_atr_mode(MODE_ATR,  compute_mask(unit, value)); +        gpio_atr_3000_impl::set_atr_mode(MODE_GPIO, compute_mask(unit, ~value)); +    } + +    inline void set_gpio_ddr(const db_unit_t unit, const boost::uint16_t value) +    { +        gpio_atr_3000_impl::set_gpio_ddr(DDR_OUTPUT, compute_mask(unit, value)); +        gpio_atr_3000_impl::set_gpio_ddr(DDR_INPUT,  compute_mask(unit, ~value)); +    } + +    inline void set_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr, const boost::uint16_t value) +    { +        gpio_atr_3000_impl::set_atr_reg(atr, +            static_cast<boost::uint32_t>(value) << compute_shift(unit), +            compute_mask(unit, ~(_atr_disable_reg.get(masked_reg_t::REGISTER)))); +    } + +    inline void set_gpio_out(const db_unit_t unit, const boost::uint16_t value) +    { +        gpio_atr_3000_impl::set_atr_reg(ATR_REG_IDLE, +            static_cast<boost::uint32_t>(value) << compute_shift(unit), +            compute_mask(unit, _atr_disable_reg.get(masked_reg_t::REGISTER))); +    } + +    inline boost::uint16_t read_gpio(const db_unit_t unit) +    { +        return boost::uint16_t(gpio_atr_3000_impl::read_gpio() >> compute_shift(unit)); +    } + +private: +    inline boost::uint32_t compute_shift(const db_unit_t unit) { +        return (unit == dboard_iface::UNIT_RX) ? 0 : 16; +    } + +    inline boost::uint32_t compute_mask(const db_unit_t unit, const boost::uint16_t mask) { +        return static_cast<boost::uint32_t>(mask) << (compute_shift(unit)); +    } +}; + +db_gpio_atr_3000::sptr db_gpio_atr_3000::make( +    wb_iface::sptr iface, const wb_iface::wb_addr_type base, const wb_iface::wb_addr_type rb_addr +) { +    return sptr(new db_gpio_atr_3000_impl(iface, base, rb_addr)); +} + +}}} diff --git a/host/lib/usrp/cores/gpio_atr_3000.hpp b/host/lib/usrp/cores/gpio_atr_3000.hpp new file mode 100644 index 000000000..b30cd3b85 --- /dev/null +++ b/host/lib/usrp/cores/gpio_atr_3000.hpp @@ -0,0 +1,175 @@ +// +// Copyright 2011,2014,2015 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program.  If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_LIBUHD_USRP_GPIO_CORE_3000_HPP +#define INCLUDED_LIBUHD_USRP_GPIO_CORE_3000_HPP + +#include <uhd/config.hpp> +#include <uhd/usrp/dboard_iface.hpp> +#include <uhd/usrp/gpio_defs.hpp> +#include <boost/shared_ptr.hpp> +#include <uhd/types/wb_iface.hpp> + +namespace uhd { namespace usrp { namespace gpio_atr { + +class gpio_atr_3000 : boost::noncopyable { +public: +    typedef boost::shared_ptr<gpio_atr_3000> sptr; + +    static const boost::uint32_t MASK_SET_ALL = 0xFFFFFFFF; + +    virtual ~gpio_atr_3000(void) {}; + +    /*! +     * Create a read-write GPIO ATR interface object +     * +     * \param iface register iface to GPIO ATR registers +     * \param base base settings offset for GPIO ATR registers +     * \param base readback offset for GPIO ATR registers +     */ +    static sptr make( +        uhd::wb_iface::sptr iface, +        const uhd::wb_iface::wb_addr_type base, +        const uhd::wb_iface::wb_addr_type rb_addr); + +    /*! +     * Create a write-only GPIO ATR interface object +     * +     * \param iface register iface to GPIO ATR registers +     * \param base base settings offset for GPIO ATR registers +     */ +    static sptr make_write_only( +        uhd::wb_iface::sptr iface, const uhd::wb_iface::wb_addr_type base); + +    /*! +     * Select the ATR mode for all bits in the mask +     * +     * \param mode the mode to apply {ATR = outputs driven by ATR state machine, GPIO = outputs static} +     * \param mask apply the mode to all non-zero bits in the mask +     */ +    virtual void set_atr_mode(const gpio_atr_mode_t mode, const boost::uint32_t mask) = 0; + +    /*! +     * Select the data direction for all bits in the mask +     * +     * \param dir the direction {OUTPUT, INPUT} +     * \param mask apply the mode to all non-zero bits in the mask +     */ +    virtual void set_gpio_ddr(const gpio_ddr_t dir, const boost::uint32_t mask) = 0; + +    /*! +     * Write the specified (masked) value to the ATR register +     * +     * \param atr the type of ATR register to write to {IDLE, RX, TX, FDX} +     * \param value the value to write +     * \param mask only writes to the bits where mask is non-zero +     */ +    virtual void set_atr_reg(const gpio_atr_reg_t atr, const boost::uint32_t value, const boost::uint32_t mask = MASK_SET_ALL) = 0; + +    /*! +     * Write to a static GPIO output +     * +     * \param value the value to write +     * \param mask only writes to the bits where mask is non-zero +     */ +    virtual void set_gpio_out(const boost::uint32_t value, const boost::uint32_t mask = MASK_SET_ALL) = 0; + +    /*! +     * Read the state of the GPIO pins +     * If a pin is configured as an input, reads the actual value of the pin +     * If a pin is configured as an output, reads the last value written to the pin +     * +     * \return the value read back +     */ +    virtual boost::uint32_t read_gpio() = 0; + +    /*! +     * Set a GPIO attribute +     * +     * \param attr the attribute to set +     * \param value the value to write to the attribute +     */ +    virtual void set_gpio_attr(const gpio_attr_t attr, const boost::uint32_t value) = 0; +}; + +class db_gpio_atr_3000 { +public: +    typedef boost::shared_ptr<db_gpio_atr_3000> sptr; + +    typedef uhd::usrp::dboard_iface::unit_t db_unit_t; + +    virtual ~db_gpio_atr_3000(void) {}; + +    /*! +     * Create a read-write GPIO ATR interface object for a daughterboard connector +     * +     * \param iface register iface to GPIO ATR registers +     * \param base base settings offset for GPIO ATR registers +     * \param base readback offset for GPIO ATR registers +     */ +    static sptr make( +        uhd::wb_iface::sptr iface, +        const uhd::wb_iface::wb_addr_type base, +        const uhd::wb_iface::wb_addr_type rb_addr); + +    /*! +     * Configure the GPIO mode for all pins in the daughterboard connector +     * +     * \param unit the side of the daughterboard interface to configure (TX or RX) +     * \param value if value[i] is 1, the i'th bit is in ATR mode otherwise it is in GPIO mode +     */ +    virtual void set_pin_ctrl(const db_unit_t unit, const boost::uint16_t value) = 0; + +    /*! +     * Configure the direction for all pins in the daughterboard connector +     * +     * \param unit the side of the daughterboard interface to configure (TX or RX) +     * \param value if value[i] is 1, the i'th bit is an output otherwise it is an input +     */ +    virtual void set_gpio_ddr(const db_unit_t unit, const boost::uint16_t value) = 0; + +    /*! +     * Write the specified value to the ATR register (all bits) +     * +     * \param atr the type of ATR register to write to {IDLE, RX, TX, FDX} +     * \param unit the side of the daughterboard interface to configure (TX or RX) +     * \param value the value to write +     */ +    virtual void set_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr, const boost::uint16_t value) = 0; + +    /*! +     * Write the specified value to the GPIO register (all bits) +     * +     * \param atr the type of ATR register to write to {IDLE, RX, TX, FDX} +     * \param value the value to write +     */ +    virtual void set_gpio_out(const db_unit_t unit, const boost::uint16_t value) = 0; + +    /*! +     * Read the state of the GPIO pins +     * If a pin is configured as an input, reads the actual value of the pin +     * If a pin is configured as an output, reads the last value written to the pin +     * +     * \param unit the side of the daughterboard interface to configure (TX or RX) +     * \return the value read back +     */ +    virtual boost::uint16_t read_gpio(const db_unit_t unit) = 0; +}; + +}}} //namespaces + +#endif /* INCLUDED_LIBUHD_USRP_GPIO_CORE_3000_HPP */ diff --git a/host/lib/usrp/cores/gpio_core_200.cpp b/host/lib/usrp/cores/gpio_core_200.cpp index 4f1c25a0b..05a689845 100644 --- a/host/lib/usrp/cores/gpio_core_200.cpp +++ b/host/lib/usrp/cores/gpio_core_200.cpp @@ -77,10 +77,10 @@ private:      }      void update(void){ -        this->update(dboard_iface::ATR_REG_IDLE, REG_GPIO_IDLE); -        this->update(dboard_iface::ATR_REG_TX_ONLY, REG_GPIO_TX_ONLY); -        this->update(dboard_iface::ATR_REG_RX_ONLY, REG_GPIO_RX_ONLY); -        this->update(dboard_iface::ATR_REG_FULL_DUPLEX, REG_GPIO_BOTH); +        this->update(gpio_atr::ATR_REG_IDLE, REG_GPIO_IDLE); +        this->update(gpio_atr::ATR_REG_TX_ONLY, REG_GPIO_TX_ONLY); +        this->update(gpio_atr::ATR_REG_RX_ONLY, REG_GPIO_RX_ONLY); +        this->update(gpio_atr::ATR_REG_FULL_DUPLEX, REG_GPIO_BOTH);      }      void update(const atr_reg_t atr, const size_t addr){ @@ -122,17 +122,17 @@ public:      }      void set_atr_reg(const atr_reg_t atr, const boost::uint32_t value){ -        if (atr == dboard_iface::ATR_REG_IDLE)        _iface->poke32(REG_GPIO_IDLE, value); -        if (atr == dboard_iface::ATR_REG_TX_ONLY)     _iface->poke32(REG_GPIO_TX_ONLY, value); -        if (atr == dboard_iface::ATR_REG_RX_ONLY)     _iface->poke32(REG_GPIO_RX_ONLY, value); -        if (atr == dboard_iface::ATR_REG_FULL_DUPLEX) _iface->poke32(REG_GPIO_BOTH, value); +        if (atr == gpio_atr::ATR_REG_IDLE)        _iface->poke32(REG_GPIO_IDLE, value); +        if (atr == gpio_atr::ATR_REG_TX_ONLY)     _iface->poke32(REG_GPIO_TX_ONLY, value); +        if (atr == gpio_atr::ATR_REG_RX_ONLY)     _iface->poke32(REG_GPIO_RX_ONLY, value); +        if (atr == gpio_atr::ATR_REG_FULL_DUPLEX) _iface->poke32(REG_GPIO_BOTH, value);      }      void set_all_regs(const boost::uint32_t value){ -        this->set_atr_reg(dboard_iface::ATR_REG_IDLE,        value); -        this->set_atr_reg(dboard_iface::ATR_REG_TX_ONLY,     value); -        this->set_atr_reg(dboard_iface::ATR_REG_RX_ONLY,     value); -        this->set_atr_reg(dboard_iface::ATR_REG_FULL_DUPLEX, value); +        this->set_atr_reg(gpio_atr::ATR_REG_IDLE,        value); +        this->set_atr_reg(gpio_atr::ATR_REG_TX_ONLY,     value); +        this->set_atr_reg(gpio_atr::ATR_REG_RX_ONLY,     value); +        this->set_atr_reg(gpio_atr::ATR_REG_FULL_DUPLEX, value);      }  private: diff --git a/host/lib/usrp/cores/gpio_core_200.hpp b/host/lib/usrp/cores/gpio_core_200.hpp index e22834fd9..c60507792 100644 --- a/host/lib/usrp/cores/gpio_core_200.hpp +++ b/host/lib/usrp/cores/gpio_core_200.hpp @@ -20,6 +20,7 @@  #include <uhd/config.hpp>  #include <uhd/usrp/dboard_iface.hpp> +#include <uhd/usrp/gpio_defs.hpp>  #include <boost/assign.hpp>  #include <boost/cstdint.hpp>  #include <boost/utility.hpp> @@ -27,28 +28,6 @@  #include <uhd/types/wb_iface.hpp>  #include <map> -typedef enum { -    GPIO_CTRL, -    GPIO_DDR, -    GPIO_OUT, -    GPIO_ATR_0X, -    GPIO_ATR_RX, -    GPIO_ATR_TX, -    GPIO_ATR_XX -} gpio_attr_t; - -typedef std::map<gpio_attr_t,std::string> gpio_attr_map_t; -static const gpio_attr_map_t gpio_attr_map = -    boost::assign::map_list_of -        (GPIO_CTRL,   "CTRL") -        (GPIO_DDR,    "DDR") -        (GPIO_OUT,    "OUT") -        (GPIO_ATR_0X, "ATR_0X") -        (GPIO_ATR_RX, "ATR_RX") -        (GPIO_ATR_TX, "ATR_TX") -        (GPIO_ATR_XX, "ATR_XX") -; -  class gpio_core_200 : boost::noncopyable{  public:      typedef boost::shared_ptr<gpio_core_200> sptr; diff --git a/host/lib/usrp/dboard/db_rfx.cpp b/host/lib/usrp/dboard/db_rfx.cpp index 1342c913d..3e7df9a39 100644 --- a/host/lib/usrp/dboard/db_rfx.cpp +++ b/host/lib/usrp/dboard/db_rfx.cpp @@ -248,15 +248,15 @@ rfx_xcvr::rfx_xcvr(      this->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, output_enables);      //setup the tx atr (this does not change with antenna) -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE,        _power_up | ANT_XX | MIXER_DIS); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY,     _power_up | ANT_RX | MIXER_DIS); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     _power_up | ANT_TX | MIXER_ENB); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, _power_up | ANT_TX | MIXER_ENB); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_IDLE,        _power_up | ANT_XX | MIXER_DIS); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_RX_ONLY,     _power_up | ANT_RX | MIXER_DIS); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     _power_up | ANT_TX | MIXER_ENB); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, _power_up | ANT_TX | MIXER_ENB);      //setup the rx atr (this does not change with antenna) -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE,        _power_up | ANT_XX | MIXER_DIS); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY,     _power_up | ANT_XX | MIXER_DIS); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, _power_up | ANT_RX2| MIXER_ENB); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_IDLE,        _power_up | ANT_XX | MIXER_DIS); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_TX_ONLY,     _power_up | ANT_XX | MIXER_DIS); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_FULL_DUPLEX, _power_up | ANT_RX2| MIXER_ENB);  }  rfx_xcvr::~rfx_xcvr(void){ @@ -272,14 +272,14 @@ void rfx_xcvr::set_rx_ant(const std::string &ant){      //set the rx atr regs that change with antenna setting      if (ant == "CAL") { -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY,     _power_up | ANT_TXRX  | MIXER_ENB); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, _power_up | ANT_TXRX  | MIXER_ENB); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY,     _power_up | MIXER_ENB | ANT_TXRX ); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_TX_ONLY,     _power_up | ANT_TXRX  | MIXER_ENB); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_FULL_DUPLEX, _power_up | ANT_TXRX  | MIXER_ENB); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_RX_ONLY,     _power_up | MIXER_ENB | ANT_TXRX );      }       else { -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY,     _power_up | ANT_XX | MIXER_DIS); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, _power_up | ANT_RX2| MIXER_ENB); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY,     _power_up | MIXER_ENB | +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_TX_ONLY,     _power_up | ANT_XX | MIXER_DIS); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_FULL_DUPLEX, _power_up | ANT_RX2| MIXER_ENB); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_RX_ONLY,     _power_up | MIXER_ENB |              ((ant == "TX/RX")? ANT_TXRX : ANT_RX2));      } @@ -292,12 +292,12 @@ void rfx_xcvr::set_tx_ant(const std::string &ant){      //set the tx atr regs that change with antenna setting      if (ant == "CAL") { -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     _power_up | ANT_RX | MIXER_ENB); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, _power_up | ANT_RX | MIXER_ENB); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     _power_up | ANT_RX | MIXER_ENB); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, _power_up | ANT_RX | MIXER_ENB);      }       else { -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     _power_up | ANT_TX | MIXER_ENB); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, _power_up | ANT_TX | MIXER_ENB); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     _power_up | ANT_TX | MIXER_ENB); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, _power_up | ANT_TX | MIXER_ENB);      }  } diff --git a/host/lib/usrp/dboard/db_sbx_common.cpp b/host/lib/usrp/dboard/db_sbx_common.cpp index ce5166c4c..d5d55dd17 100644 --- a/host/lib/usrp/dboard/db_sbx_common.cpp +++ b/host/lib/usrp/dboard/db_sbx_common.cpp @@ -265,39 +265,39 @@ void sbx_xcvr::update_atr(void){      //setup the tx atr (this does not change with antenna)      this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_IDLE, 0 | tx_lo_lpf_en \ +            gpio_atr::ATR_REG_IDLE, 0 | tx_lo_lpf_en \              | tx_ld_led | tx_ant_led | TX_POWER_UP | ANT_XX | TX_MIXER_DIS);      //setup the rx atr (this does not change with antenna)      this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_IDLE, rx_pga0_iobits | rx_lo_lpf_en \ +            gpio_atr::ATR_REG_IDLE, rx_pga0_iobits | rx_lo_lpf_en \              | rx_ld_led | rx_ant_led | RX_POWER_UP | ANT_XX | RX_MIXER_DIS);      //set the RX atr regs that change with antenna setting      this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_RX_ONLY, rx_pga0_iobits | rx_lo_lpf_en \ +            gpio_atr::ATR_REG_RX_ONLY, rx_pga0_iobits | rx_lo_lpf_en \              | rx_ld_led | rx_ant_led | RX_POWER_UP | RX_MIXER_ENB \              | ((_rx_ant != "RX2")? ANT_TXRX : ANT_RX2));      this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_TX_ONLY, rx_pga0_iobits | rx_lo_lpf_en \ +            gpio_atr::ATR_REG_TX_ONLY, rx_pga0_iobits | rx_lo_lpf_en \              | rx_ld_led | rx_ant_led | RX_POWER_UP | RX_MIXER_DIS \              | ((_rx_ant == "CAL")? ANT_TXRX : ANT_RX2));      this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_FULL_DUPLEX, rx_pga0_iobits | rx_lo_lpf_en \ +            gpio_atr::ATR_REG_FULL_DUPLEX, rx_pga0_iobits | rx_lo_lpf_en \              | rx_ld_led | rx_ant_led | RX_POWER_UP | RX_MIXER_ENB \              | ((_rx_ant == "CAL")? ANT_TXRX : ANT_RX2));      //set the TX atr regs that change with antenna setting      this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_RX_ONLY, 0 | tx_lo_lpf_en \ +            gpio_atr::ATR_REG_RX_ONLY, 0 | tx_lo_lpf_en \              | tx_ld_led | tx_ant_led | TX_POWER_UP | TX_MIXER_DIS \              | ((_rx_ant != "RX2")? ANT_RX : ANT_TX));      this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_TX_ONLY, tx_pga0_iobits | tx_lo_lpf_en \ +            gpio_atr::ATR_REG_TX_ONLY, tx_pga0_iobits | tx_lo_lpf_en \              | tx_ld_led | tx_ant_led | TX_POWER_UP | TX_MIXER_ENB \              | ((_tx_ant == "CAL")? ANT_RX : ANT_TX));      this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_FULL_DUPLEX, tx_pga0_iobits | tx_lo_lpf_en \ +            gpio_atr::ATR_REG_FULL_DUPLEX, tx_pga0_iobits | tx_lo_lpf_en \              | tx_ld_led | tx_ant_led | TX_POWER_UP | TX_MIXER_ENB \              | ((_tx_ant == "CAL")? ANT_RX : ANT_TX));  } diff --git a/host/lib/usrp/dboard/db_ubx.cpp b/host/lib/usrp/dboard/db_ubx.cpp index a4c8fc507..db9f21f43 100644 --- a/host/lib/usrp/dboard/db_ubx.cpp +++ b/host/lib/usrp/dboard/db_ubx.cpp @@ -319,14 +319,14 @@ public:          write_gpio();          // Configure ATR -        _iface->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE, _tx_gpio_reg.atr_idle); -        _iface->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY, _tx_gpio_reg.atr_tx); -        _iface->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY, _tx_gpio_reg.atr_rx); -        _iface->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, _tx_gpio_reg.atr_full_duplex); -        _iface->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, _rx_gpio_reg.atr_idle); -        _iface->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, _rx_gpio_reg.atr_tx); -        _iface->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, _rx_gpio_reg.atr_rx); -        _iface->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, _rx_gpio_reg.atr_full_duplex); +        _iface->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_IDLE, _tx_gpio_reg.atr_idle); +        _iface->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY, _tx_gpio_reg.atr_tx); +        _iface->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_RX_ONLY, _tx_gpio_reg.atr_rx); +        _iface->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, _tx_gpio_reg.atr_full_duplex); +        _iface->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_IDLE, _rx_gpio_reg.atr_idle); +        _iface->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_TX_ONLY, _rx_gpio_reg.atr_tx); +        _iface->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_RX_ONLY, _rx_gpio_reg.atr_rx); +        _iface->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_FULL_DUPLEX, _rx_gpio_reg.atr_full_duplex);          // Engage ATR control (1 is ATR control, 0 is manual control)          _iface->set_pin_ctrl(dboard_iface::UNIT_TX, _tx_gpio_reg.atr_mask); diff --git a/host/lib/usrp/dboard/db_wbx_simple.cpp b/host/lib/usrp/dboard/db_wbx_simple.cpp index c8f2be155..dda2def95 100644 --- a/host/lib/usrp/dboard/db_wbx_simple.cpp +++ b/host/lib/usrp/dboard/db_wbx_simple.cpp @@ -112,14 +112,14 @@ wbx_simple::wbx_simple(ctor_args_t args) : wbx_base(args){      this->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, ANTSW_IO, ANTSW_IO);      //setup ATR for the antenna switches (constant) -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE,        ANT_RX, ANTSW_IO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY,     ANT_RX, ANTSW_IO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     ANT_TX, ANTSW_IO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, ANT_TX, ANTSW_IO); - -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE,        ANT_TXRX, ANTSW_IO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY,     ANT_RX2, ANTSW_IO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, ANT_RX2, ANTSW_IO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_IDLE,        ANT_RX, ANTSW_IO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_RX_ONLY,     ANT_RX, ANTSW_IO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     ANT_TX, ANTSW_IO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, ANT_TX, ANTSW_IO); + +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_IDLE,        ANT_TXRX, ANTSW_IO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_TX_ONLY,     ANT_RX2, ANTSW_IO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_FULL_DUPLEX, ANT_RX2, ANTSW_IO);  }  wbx_simple::~wbx_simple(void){ @@ -138,14 +138,14 @@ void wbx_simple::set_rx_ant(const std::string &ant){      //write the new antenna setting to atr regs      if (_rx_ant == "CAL") { -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY,     ANT_TXRX, ANTSW_IO); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, ANT_TXRX, ANTSW_IO); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY,     ANT_TXRX, ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_TX_ONLY,     ANT_TXRX, ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_FULL_DUPLEX, ANT_TXRX, ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_RX_ONLY,     ANT_TXRX, ANTSW_IO);      }       else { -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY,     ANT_RX2, ANTSW_IO); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, ANT_RX2, ANTSW_IO); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, ((_rx_ant == "TX/RX")? ANT_TXRX : ANT_RX2), ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_TX_ONLY,     ANT_RX2, ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_FULL_DUPLEX, ANT_RX2, ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_RX_ONLY, ((_rx_ant == "TX/RX")? ANT_TXRX : ANT_RX2), ANTSW_IO);      }  } @@ -154,11 +154,11 @@ void wbx_simple::set_tx_ant(const std::string &ant){      //write the new antenna setting to atr regs      if (ant == "CAL") { -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     ANT_RX, ANTSW_IO); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, ANT_RX, ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     ANT_RX, ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, ANT_RX, ANTSW_IO);      }       else { -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     ANT_TX, ANTSW_IO); -        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, ANT_TX, ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     ANT_TX, ANTSW_IO); +        this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, ANT_TX, ANTSW_IO);      }  } diff --git a/host/lib/usrp/dboard/db_wbx_version2.cpp b/host/lib/usrp/dboard/db_wbx_version2.cpp index 93047fb7a..78b5b2871 100644 --- a/host/lib/usrp/dboard/db_wbx_version2.cpp +++ b/host/lib/usrp/dboard/db_wbx_version2.cpp @@ -117,15 +117,15 @@ wbx_base::wbx_version2::wbx_version2(wbx_base *_self_wbx_base) {      self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, RX_PUP_5V|RX_PUP_3V|ADF435X_CE|RXBB_PDB|ADF435X_PDBRF|RX_ATTN_MASK);      //setup ATR for the mixer enables (always enabled to prevent phase slip between bursts) -    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE,        v2_tx_mod, TX_MIXER_DIS | v2_tx_mod); -    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY,     v2_tx_mod, TX_MIXER_DIS | v2_tx_mod); -    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     v2_tx_mod, TX_MIXER_DIS | v2_tx_mod); -    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, v2_tx_mod, TX_MIXER_DIS | v2_tx_mod); - -    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE,        RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB); -    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY,     RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB); -    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY,     RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB); -    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB); +    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_IDLE,        v2_tx_mod, TX_MIXER_DIS | v2_tx_mod); +    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_RX_ONLY,     v2_tx_mod, TX_MIXER_DIS | v2_tx_mod); +    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     v2_tx_mod, TX_MIXER_DIS | v2_tx_mod); +    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, v2_tx_mod, TX_MIXER_DIS | v2_tx_mod); + +    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_IDLE,        RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB); +    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_TX_ONLY,     RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB); +    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_RX_ONLY,     RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB); +    self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_FULL_DUPLEX, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);  }  wbx_base::wbx_version2::~wbx_version2(void){ diff --git a/host/lib/usrp/dboard/db_wbx_version3.cpp b/host/lib/usrp/dboard/db_wbx_version3.cpp index 6927ae4e4..a5821ffc2 100644 --- a/host/lib/usrp/dboard/db_wbx_version3.cpp +++ b/host/lib/usrp/dboard/db_wbx_version3.cpp @@ -129,29 +129,29 @@ wbx_base::wbx_version3::wbx_version3(wbx_base *_self_wbx_base) {      //slip between bursts).  set TX gain iobits to min gain (max attenuation)      //when RX_ONLY or IDLE to suppress LO leakage      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_IDLE, v3_tx_mod, \ +            gpio_atr::ATR_REG_IDLE, v3_tx_mod, \              TX_ATTN_MASK | TX_MIXER_DIS | v3_tx_mod);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_RX_ONLY, v3_tx_mod, \ +            gpio_atr::ATR_REG_RX_ONLY, v3_tx_mod, \              TX_ATTN_MASK | TX_MIXER_DIS | v3_tx_mod);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_TX_ONLY, v3_tx_mod, \ +            gpio_atr::ATR_REG_TX_ONLY, v3_tx_mod, \              TX_ATTN_MASK | TX_MIXER_DIS | v3_tx_mod);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_FULL_DUPLEX, v3_tx_mod, \ +            gpio_atr::ATR_REG_FULL_DUPLEX, v3_tx_mod, \              TX_ATTN_MASK | TX_MIXER_DIS | v3_tx_mod);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_IDLE, \ +            gpio_atr::ATR_REG_IDLE, \              RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_TX_ONLY, \ +            gpio_atr::ATR_REG_TX_ONLY, \              RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_RX_ONLY, \ +            gpio_atr::ATR_REG_RX_ONLY, \              RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_FULL_DUPLEX, \ +            gpio_atr::ATR_REG_FULL_DUPLEX, \              RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);  } @@ -181,8 +181,8 @@ double wbx_base::wbx_version3::set_tx_gain(double gain, const std::string &name)          //write the new gain to tx gpio outputs          //Update ATR with gain io_bits, only update for TX_ONLY and FULL_DUPLEX ATR states -        self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     io_bits, TX_ATTN_MASK); -        self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, io_bits, TX_ATTN_MASK); +        self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     io_bits, TX_ATTN_MASK); +        self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, io_bits, TX_ATTN_MASK);      }      else UHD_THROW_INVALID_CODE_PATH();      return self_base->_tx_gains[name]; //shadow diff --git a/host/lib/usrp/dboard/db_wbx_version4.cpp b/host/lib/usrp/dboard/db_wbx_version4.cpp index 81cdaefac..327ae675b 100644 --- a/host/lib/usrp/dboard/db_wbx_version4.cpp +++ b/host/lib/usrp/dboard/db_wbx_version4.cpp @@ -136,29 +136,29 @@ wbx_base::wbx_version4::wbx_version4(wbx_base *_self_wbx_base) {      //between bursts) set TX gain iobits to min gain (max attenuation) when      //RX_ONLY or IDLE to suppress LO leakage      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_IDLE, v4_tx_mod, \ +            gpio_atr::ATR_REG_IDLE, v4_tx_mod, \              TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_RX_ONLY, v4_tx_mod, \ +            gpio_atr::ATR_REG_RX_ONLY, v4_tx_mod, \              TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_TX_ONLY, v4_tx_mod, \ +            gpio_atr::ATR_REG_TX_ONLY, v4_tx_mod, \              TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \ -            dboard_iface::ATR_REG_FULL_DUPLEX, v4_tx_mod, \ +            gpio_atr::ATR_REG_FULL_DUPLEX, v4_tx_mod, \              TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_IDLE, \ +            gpio_atr::ATR_REG_IDLE, \              RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_TX_ONLY, \ +            gpio_atr::ATR_REG_TX_ONLY, \              RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_RX_ONLY, \ +            gpio_atr::ATR_REG_RX_ONLY, \              RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);      self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \ -            dboard_iface::ATR_REG_FULL_DUPLEX, \ +            gpio_atr::ATR_REG_FULL_DUPLEX, \              RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);  } @@ -188,8 +188,8 @@ double wbx_base::wbx_version4::set_tx_gain(double gain, const std::string &name)          //write the new gain to tx gpio outputs          //Update ATR with gain io_bits, only update for TX_ONLY and FULL_DUPLEX ATR states -        self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     io_bits, TX_ATTN_MASK); -        self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, io_bits, TX_ATTN_MASK); +        self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     io_bits, TX_ATTN_MASK); +        self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, io_bits, TX_ATTN_MASK);      }      else UHD_THROW_INVALID_CODE_PATH(); diff --git a/host/lib/usrp/dboard/db_xcvr2450.cpp b/host/lib/usrp/dboard/db_xcvr2450.cpp index 50c67991a..092f84548 100644 --- a/host/lib/usrp/dboard/db_xcvr2450.cpp +++ b/host/lib/usrp/dboard/db_xcvr2450.cpp @@ -315,12 +315,12 @@ xcvr2450::~xcvr2450(void){  void xcvr2450::spi_reset(void){      //spi reset mode: global enable = off, tx and rx enable = on -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE, TX_ENB_TXIO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, RX_ENB_RXIO | POWER_DOWN_RXIO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_IDLE, TX_ENB_TXIO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_IDLE, RX_ENB_RXIO | POWER_DOWN_RXIO);      boost::this_thread::sleep(boost::posix_time::milliseconds(10));      //take it back out of spi reset mode and wait a bit -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, RX_DIS_RXIO | POWER_UP_RXIO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_IDLE, RX_DIS_RXIO | POWER_UP_RXIO);      boost::this_thread::sleep(boost::posix_time::milliseconds(10));  } @@ -337,16 +337,16 @@ void xcvr2450::update_atr(void){      int ad9515div  = (_ad9515div == 3)? AD9515DIV_3_TXIO : AD9515DIV_2_TXIO;      //set the tx registers -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE,        band_sel | ad9515div | TX_DIS_TXIO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY,     band_sel | ad9515div | TX_DIS_TXIO | rx_ant_sel); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY,     band_sel | ad9515div | TX_ENB_TXIO | tx_ant_sel); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, band_sel | ad9515div | TX_ENB_TXIO | xx_ant_sel); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_IDLE,        band_sel | ad9515div | TX_DIS_TXIO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_RX_ONLY,     band_sel | ad9515div | TX_DIS_TXIO | rx_ant_sel); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_TX_ONLY,     band_sel | ad9515div | TX_ENB_TXIO | tx_ant_sel); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, gpio_atr::ATR_REG_FULL_DUPLEX, band_sel | ad9515div | TX_ENB_TXIO | xx_ant_sel);      //set the rx registers -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE,        POWER_UP_RXIO | RX_DIS_RXIO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY,     POWER_UP_RXIO | RX_ENB_RXIO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY,     POWER_UP_RXIO | RX_DIS_RXIO); -    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, POWER_UP_RXIO | RX_DIS_RXIO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_IDLE,        POWER_UP_RXIO | RX_DIS_RXIO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_RX_ONLY,     POWER_UP_RXIO | RX_ENB_RXIO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_TX_ONLY,     POWER_UP_RXIO | RX_DIS_RXIO); +    this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, gpio_atr::ATR_REG_FULL_DUPLEX, POWER_UP_RXIO | RX_DIS_RXIO);  }  /*********************************************************************** diff --git a/host/lib/usrp/e300/e300_impl.cpp b/host/lib/usrp/e300/e300_impl.cpp index 6d66e83c0..cfa85a46a 100644 --- a/host/lib/usrp/e300/e300_impl.cpp +++ b/host/lib/usrp/e300/e300_impl.cpp @@ -48,6 +48,7 @@  using namespace uhd;  using namespace uhd::usrp; +using namespace uhd::usrp::gpio_atr;  using namespace uhd::transport;  namespace fs = boost::filesystem;  namespace asio = boost::asio; @@ -512,15 +513,15 @@ e300_impl::e300_impl(const uhd::device_addr_t &device_addr)      ////////////////////////////////////////////////////////////////////      // internal gpios      //////////////////////////////////////////////////////////////////// -    gpio_core_200::sptr fp_gpio = gpio_core_200::make(_radio_perifs[0].ctrl, radio::sr_addr(radio::FP_GPIO), radio::RB32_FP_GPIO); +    gpio_atr_3000::sptr fp_gpio = gpio_atr_3000::make(_radio_perifs[0].ctrl, radio::sr_addr(radio::FP_GPIO), radio::RB32_FP_GPIO);      BOOST_FOREACH(const gpio_attr_map_t::value_type attr, gpio_attr_map)      {          _tree->create<boost::uint32_t>(mb_path / "gpio" / "INT0" / attr.second) -            .subscribe(boost::bind(&e300_impl::_set_internal_gpio, this, fp_gpio, attr.first, _1)) +            .subscribe(boost::bind(&gpio_atr_3000::set_gpio_attr, fp_gpio, attr.first, _1))              .set(0);      }      _tree->create<boost::uint8_t>(mb_path / "gpio" / "INT0" / "READBACK") -        .publish(boost::bind(&e300_impl::_get_internal_gpio, this, fp_gpio)); +        .publish(boost::bind(&gpio_atr_3000::read_gpio, fp_gpio));      //////////////////////////////////////////////////////////////////// @@ -623,37 +624,6 @@ e300_impl::e300_impl(const uhd::device_addr_t &device_addr)      _tree->access<subdev_spec_t>(mb_path / "tx_subdev_spec").set(tx_spec);  } -boost::uint8_t e300_impl::_get_internal_gpio(gpio_core_200::sptr gpio) -{ -    return boost::uint32_t(gpio->read_gpio(dboard_iface::UNIT_RX)); -} - -void e300_impl::_set_internal_gpio( -    gpio_core_200::sptr gpio, -    const gpio_attr_t attr, -    const boost::uint32_t value) -{ -    switch (attr) -    { -    case GPIO_CTRL: -        return gpio->set_pin_ctrl(dboard_iface::UNIT_RX, value); -    case GPIO_DDR: -        return gpio->set_gpio_ddr(dboard_iface::UNIT_RX, value); -    case GPIO_OUT: -        return gpio->set_gpio_out(dboard_iface::UNIT_RX, value); -    case GPIO_ATR_0X: -        return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, value); -    case GPIO_ATR_RX: -        return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, value); -    case GPIO_ATR_TX: -        return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, value); -    case GPIO_ATR_XX: -        return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, value); -    default: -        UHD_THROW_INVALID_CODE_PATH(); -    } -} -  uhd::sensor_value_t e300_impl::_get_fe_pll_lock(const bool is_tx)  {      const boost::uint32_t st = @@ -978,7 +948,8 @@ void e300_impl::_setup_radio(const size_t dspno)      ////////////////////////////////////////////////////////////////////      // Set up peripherals      //////////////////////////////////////////////////////////////////// -    perif.atr = gpio_core_200_32wo::make(perif.ctrl, radio::sr_addr(radio::GPIO)); +    perif.atr = gpio_atr_3000::make_write_only(perif.ctrl, radio::sr_addr(radio::GPIO)); +    perif.atr->set_atr_mode(MODE_ATR, 0xFFFFFFFF);      perif.rx_fe = rx_frontend_core_200::make(perif.ctrl, radio::sr_addr(radio::RX_FRONT));      perif.rx_fe->set_dc_offset(rx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE);      perif.rx_fe->set_dc_offset_auto(rx_frontend_core_200::DEFAULT_DC_OFFSET_ENABLE); @@ -1291,11 +1262,11 @@ void e300_impl::_update_atrs(void)          if (enb_tx)              fd_reg |= tx_enables | xx_leds; -        gpio_core_200_32wo::sptr atr = _radio_perifs[instance].atr; -        atr->set_atr_reg(dboard_iface::ATR_REG_IDLE, oo_reg); -        atr->set_atr_reg(dboard_iface::ATR_REG_RX_ONLY, rx_reg); -        atr->set_atr_reg(dboard_iface::ATR_REG_TX_ONLY, tx_reg); -        atr->set_atr_reg(dboard_iface::ATR_REG_FULL_DUPLEX, fd_reg); +        gpio_atr_3000::sptr atr = _radio_perifs[instance].atr; +        atr->set_atr_reg(ATR_REG_IDLE, oo_reg); +        atr->set_atr_reg(ATR_REG_RX_ONLY, rx_reg); +        atr->set_atr_reg(ATR_REG_TX_ONLY, tx_reg); +        atr->set_atr_reg(ATR_REG_FULL_DUPLEX, fd_reg);      }  } diff --git a/host/lib/usrp/e300/e300_impl.hpp b/host/lib/usrp/e300/e300_impl.hpp index 8aff51466..9b39c7468 100644 --- a/host/lib/usrp/e300/e300_impl.hpp +++ b/host/lib/usrp/e300/e300_impl.hpp @@ -41,7 +41,7 @@  #include "tx_dsp_core_3000.hpp"  #include "ad9361_ctrl.hpp"  #include "ad936x_manager.hpp" -#include "gpio_core_200.hpp" +#include "gpio_atr_3000.hpp"  #include "e300_global_regs.hpp"  #include "e300_i2c.hpp" @@ -146,7 +146,7 @@ private: // types      struct radio_perifs_t      {          radio_ctrl_core_3000::sptr ctrl; -        gpio_core_200_32wo::sptr atr; +        gpio_atr::gpio_atr_3000::sptr atr;          time_core_3000::sptr time64;          rx_vita_core_3000::sptr framer;          rx_dsp_core_3000::sptr ddc; @@ -277,14 +277,6 @@ private: // methods      // get frontend lock sensor      uhd::sensor_value_t _get_fe_pll_lock(const bool is_tx); -    // internal gpios -    boost::uint8_t _get_internal_gpio(gpio_core_200::sptr); - -    void _set_internal_gpio( -        gpio_core_200::sptr gpio, -        const gpio_attr_t attr, -        const boost::uint32_t value); -  private: // members      uhd::device_addr_t                     _device_addr;      xport_t                                _xport_path; diff --git a/host/lib/usrp/multi_usrp.cpp b/host/lib/usrp/multi_usrp.cpp index 57c593efb..dbc0ebed2 100644 --- a/host/lib/usrp/multi_usrp.cpp +++ b/host/lib/usrp/multi_usrp.cpp @@ -1348,10 +1348,10 @@ public:              if (attr == "CTRL") iface->set_pin_ctrl(unit, boost::uint16_t(value), boost::uint16_t(mask));              if (attr == "DDR") iface->set_gpio_ddr(unit, boost::uint16_t(value), boost::uint16_t(mask));              if (attr == "OUT") iface->set_gpio_out(unit, boost::uint16_t(value), boost::uint16_t(mask)); -            if (attr == "ATR_0X") iface->set_atr_reg(unit, dboard_iface::ATR_REG_IDLE, boost::uint16_t(value), boost::uint16_t(mask)); -            if (attr == "ATR_RX") iface->set_atr_reg(unit, dboard_iface::ATR_REG_RX_ONLY, boost::uint16_t(value), boost::uint16_t(mask)); -            if (attr == "ATR_TX") iface->set_atr_reg(unit, dboard_iface::ATR_REG_TX_ONLY, boost::uint16_t(value), boost::uint16_t(mask)); -            if (attr == "ATR_XX") iface->set_atr_reg(unit, dboard_iface::ATR_REG_FULL_DUPLEX, boost::uint16_t(value), boost::uint16_t(mask)); +            if (attr == "ATR_0X") iface->set_atr_reg(unit, gpio_atr::ATR_REG_IDLE, boost::uint16_t(value), boost::uint16_t(mask)); +            if (attr == "ATR_RX") iface->set_atr_reg(unit, gpio_atr::ATR_REG_RX_ONLY, boost::uint16_t(value), boost::uint16_t(mask)); +            if (attr == "ATR_TX") iface->set_atr_reg(unit, gpio_atr::ATR_REG_TX_ONLY, boost::uint16_t(value), boost::uint16_t(mask)); +            if (attr == "ATR_XX") iface->set_atr_reg(unit, gpio_atr::ATR_REG_FULL_DUPLEX, boost::uint16_t(value), boost::uint16_t(mask));          }      } @@ -1369,10 +1369,10 @@ public:              if (attr == "CTRL") return iface->get_pin_ctrl(unit);              if (attr == "DDR") return iface->get_gpio_ddr(unit);              if (attr == "OUT") return iface->get_gpio_out(unit); -            if (attr == "ATR_0X") return iface->get_atr_reg(unit, dboard_iface::ATR_REG_IDLE); -            if (attr == "ATR_RX") return iface->get_atr_reg(unit, dboard_iface::ATR_REG_RX_ONLY); -            if (attr == "ATR_TX") return iface->get_atr_reg(unit, dboard_iface::ATR_REG_TX_ONLY); -            if (attr == "ATR_XX") return iface->get_atr_reg(unit, dboard_iface::ATR_REG_FULL_DUPLEX); +            if (attr == "ATR_0X") return iface->get_atr_reg(unit, gpio_atr::ATR_REG_IDLE); +            if (attr == "ATR_RX") return iface->get_atr_reg(unit, gpio_atr::ATR_REG_RX_ONLY); +            if (attr == "ATR_TX") return iface->get_atr_reg(unit, gpio_atr::ATR_REG_TX_ONLY); +            if (attr == "ATR_XX") return iface->get_atr_reg(unit, gpio_atr::ATR_REG_FULL_DUPLEX);              if (attr == "READBACK") return iface->read_gpio(unit);          }          return 0; diff --git a/host/lib/usrp/usrp1/dboard_iface.cpp b/host/lib/usrp/usrp1/dboard_iface.cpp index 4c3141d9e..502d0fbe3 100644 --- a/host/lib/usrp/usrp1/dboard_iface.cpp +++ b/host/lib/usrp/usrp1/dboard_iface.cpp @@ -63,6 +63,7 @@  using namespace uhd;  using namespace uhd::usrp; +using namespace uhd::usrp::gpio_atr;  using namespace boost::assign;  static const dboard_id_t tvrx_id(0x0040); diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp index 1e424414e..98806fe07 100644 --- a/host/lib/usrp/x300/x300_impl.cpp +++ b/host/lib/usrp/x300/x300_impl.cpp @@ -47,6 +47,7 @@ using namespace uhd;  using namespace uhd::usrp;  using namespace uhd::transport;  using namespace uhd::niusrprio; +using namespace uhd::usrp::gpio_atr;  using namespace uhd::usrp::x300;  namespace asio = boost::asio; @@ -749,15 +750,15 @@ void x300_impl::setup_mb(const size_t mb_i, const uhd::device_addr_t &dev_addr)      ////////////////////////////////////////////////////////////////////      // front panel gpio      //////////////////////////////////////////////////////////////////// -    mb.fp_gpio = gpio_core_200::make(mb.radio_perifs[0].ctrl, radio::sr_addr(radio::FP_GPIO), radio::RB32_FP_GPIO); +    mb.fp_gpio = gpio_atr_3000::make(mb.radio_perifs[0].ctrl, radio::sr_addr(radio::FP_GPIO), radio::RB32_FP_GPIO);      BOOST_FOREACH(const gpio_attr_map_t::value_type attr, gpio_attr_map)      {          _tree->create<boost::uint32_t>(mb_path / "gpio" / "FP0" / attr.second)              .set(0) -            .subscribe(boost::bind(&x300_impl::set_fp_gpio, this, mb.fp_gpio, attr.first, _1)); +            .subscribe(boost::bind(&gpio_atr_3000::set_gpio_attr, mb.fp_gpio, attr.first, _1));      }      _tree->create<boost::uint32_t>(mb_path / "gpio" / "FP0" / "READBACK") -        .publish(boost::bind(&x300_impl::get_fp_gpio, this, mb.fp_gpio)); +        .publish(boost::bind(&gpio_atr_3000::read_gpio, mb.fp_gpio));      ////////////////////////////////////////////////////////////////////      // register the time keepers - only one can be the highlander @@ -930,7 +931,8 @@ void x300_impl::setup_radio(const size_t mb_i, const std::string &slot_name, con      perif.spi = spi_core_3000::make(perif.ctrl, radio::sr_addr(radio::SPI), radio::RB32_SPI);      perif.adc = x300_adc_ctrl::make(perif.spi, DB_ADC_SEN);      perif.dac = x300_dac_ctrl::make(perif.spi, DB_DAC_SEN, mb.clock->get_master_clock_rate()); -    perif.leds = gpio_core_200_32wo::make(perif.ctrl, radio::sr_addr(radio::LEDS)); +    perif.leds = gpio_atr_3000::make_write_only(perif.ctrl, radio::sr_addr(radio::LEDS)); +    perif.leds->set_atr_mode(MODE_ATR, 0xFFFFFFFF);      perif.rx_fe = rx_frontend_core_200::make(perif.ctrl, radio::sr_addr(radio::RX_FRONT));      perif.rx_fe->set_dc_offset(rx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE);      perif.rx_fe->set_dc_offset_auto(rx_frontend_core_200::DEFAULT_DC_OFFSET_ENABLE); @@ -1014,7 +1016,7 @@ void x300_impl::setup_radio(const size_t mb_i, const std::string &slot_name, con      //create a new dboard interface      x300_dboard_iface_config_t db_config; -    db_config.gpio = gpio_core_200::make(perif.ctrl, radio::sr_addr(radio::GPIO), radio::RB32_GPIO); +    db_config.gpio = db_gpio_atr_3000::make(perif.ctrl, radio::sr_addr(radio::GPIO), radio::RB32_GPIO);      db_config.spi = perif.spi;      db_config.rx_spi_slaveno = DB_RX_SEN;      db_config.tx_spi_slaveno = DB_TX_SEN; @@ -1295,16 +1297,16 @@ boost::uint32_t x300_impl::allocate_sid(mboard_members_t &mb, const sid_config_t      return sid;  } -void x300_impl::update_atr_leds(gpio_core_200_32wo::sptr leds, const std::string &rx_ant) +void x300_impl::update_atr_leds(gpio_atr_3000::sptr leds, const std::string &rx_ant)  {      const bool is_txrx = (rx_ant == "TX/RX");      const int rx_led = (1 << 2);      const int tx_led = (1 << 1);      const int txrx_led = (1 << 0); -    leds->set_atr_reg(dboard_iface::ATR_REG_IDLE, 0); -    leds->set_atr_reg(dboard_iface::ATR_REG_RX_ONLY, is_txrx? txrx_led : rx_led); -    leds->set_atr_reg(dboard_iface::ATR_REG_TX_ONLY, tx_led); -    leds->set_atr_reg(dboard_iface::ATR_REG_FULL_DUPLEX, rx_led | tx_led); +    leds->set_atr_reg(ATR_REG_IDLE, 0); +    leds->set_atr_reg(ATR_REG_RX_ONLY, is_txrx? txrx_led : rx_led); +    leds->set_atr_reg(ATR_REG_TX_ONLY, tx_led); +    leds->set_atr_reg(ATR_REG_FULL_DUPLEX, rx_led | tx_led);  }  void x300_impl::set_tick_rate(mboard_members_t &mb, const double rate) @@ -1509,30 +1511,6 @@ void x300_impl::set_mb_eeprom(i2c_iface::sptr i2c, const mboard_eeprom_t &mb_eep  }  /*********************************************************************** - * front-panel GPIO - **********************************************************************/ - -boost::uint32_t x300_impl::get_fp_gpio(gpio_core_200::sptr gpio) -{ -    return boost::uint32_t(gpio->read_gpio(dboard_iface::UNIT_RX)); -} - -void x300_impl::set_fp_gpio(gpio_core_200::sptr gpio, const gpio_attr_t attr, const boost::uint32_t value) -{ -    switch (attr) -    { -    case GPIO_CTRL:   return gpio->set_pin_ctrl(dboard_iface::UNIT_RX, value); -    case GPIO_DDR:    return gpio->set_gpio_ddr(dboard_iface::UNIT_RX, value); -    case GPIO_OUT:    return gpio->set_gpio_out(dboard_iface::UNIT_RX, value); -    case GPIO_ATR_0X: return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, value); -    case GPIO_ATR_RX: return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, value); -    case GPIO_ATR_TX: return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, value); -    case GPIO_ATR_XX: return gpio->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, value); -    default:        UHD_THROW_INVALID_CODE_PATH(); -    } -} - -/***********************************************************************   * claimer logic   **********************************************************************/ diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp index 1630047af..c351e7f00 100644 --- a/host/lib/usrp/x300/x300_impl.hpp +++ b/host/lib/usrp/x300/x300_impl.hpp @@ -41,7 +41,7 @@  #include "radio_ctrl_core_3000.hpp"  #include "rx_frontend_core_200.hpp"  #include "tx_frontend_core_200.hpp" -#include "gpio_core_200.hpp" +#include "gpio_atr_3000.hpp"  #include <boost/weak_ptr.hpp>  #include <uhd/usrp/gps_ctrl.hpp>  #include <uhd/usrp/mboard_eeprom.hpp> @@ -123,7 +123,7 @@ enum  struct x300_dboard_iface_config_t  { -    gpio_core_200::sptr gpio; +    uhd::usrp::gpio_atr::db_gpio_atr_3000::sptr gpio;      spi_core_3000::sptr spi;      size_t rx_spi_slaveno;      size_t tx_spi_slaveno; @@ -185,7 +185,7 @@ private:          rx_dsp_core_3000::sptr ddc;          tx_vita_core_3000::sptr deframer;          tx_dsp_core_3000::sptr duc; -        gpio_core_200_32wo::sptr leds; +        uhd::usrp::gpio_atr::gpio_atr_3000::sptr leds;          rx_frontend_core_200::sptr rx_fe;          tx_frontend_core_200::sptr tx_fe;          //Registers @@ -229,7 +229,7 @@ private:          //other perifs on mboard          x300_clock_ctrl::sptr clock;          uhd::gps_ctrl::sptr gps; -        gpio_core_200::sptr fp_gpio; +        uhd::usrp::gpio_atr::gpio_atr_3000::sptr fp_gpio;          uhd::usrp::x300::fw_regmap_t::sptr fw_regmap; @@ -365,9 +365,7 @@ private:      void check_fw_compat(const uhd::fs_path &mb_path, uhd::wb_iface::sptr iface);      void check_fpga_compat(const uhd::fs_path &mb_path, const mboard_members_t &members); -    void update_atr_leds(gpio_core_200_32wo::sptr, const std::string &ant); -    boost::uint32_t get_fp_gpio(gpio_core_200::sptr); -    void set_fp_gpio(gpio_core_200::sptr, const gpio_attr_t, const boost::uint32_t); +    void update_atr_leds(uhd::usrp::gpio_atr::gpio_atr_3000::sptr, const std::string &ant);      void self_cal_adc_capture_delay(mboard_members_t& mb, const size_t radio_i, bool print_status = false);      double self_cal_adc_xfer_delay(mboard_members_t& mb, bool apply_delay = false); | 
