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-rw-r--r--host/lib/usrp/x300/x300_clock_ctrl.cpp4
-rw-r--r--host/lib/usrp/x300/x300_clock_ctrl.hpp6
-rw-r--r--host/lib/usrp/x300/x300_impl.cpp26
3 files changed, 25 insertions, 11 deletions
diff --git a/host/lib/usrp/x300/x300_clock_ctrl.cpp b/host/lib/usrp/x300/x300_clock_ctrl.cpp
index a986928a7..6a0b19c8c 100644
--- a/host/lib/usrp/x300/x300_clock_ctrl.cpp
+++ b/host/lib/usrp/x300/x300_clock_ctrl.cpp
@@ -48,6 +48,10 @@ x300_clock_ctrl_impl(uhd::spi_iface::sptr spiface,
set_master_clock_rate(master_clock_rate);
}
+void reset() {
+ set_master_clock_rate(_master_clock_rate);
+}
+
void sync_clocks(void) {
//soft sync:
//put the sync IO into output mode - FPGA must be input
diff --git a/host/lib/usrp/x300/x300_clock_ctrl.hpp b/host/lib/usrp/x300/x300_clock_ctrl.hpp
index 0e3caf900..4e7d6fc8e 100644
--- a/host/lib/usrp/x300/x300_clock_ctrl.hpp
+++ b/host/lib/usrp/x300/x300_clock_ctrl.hpp
@@ -78,6 +78,12 @@ public:
* \param true = on, false = off
*/
virtual void set_ref_out(const bool) = 0;
+
+ /*! Reset the clock control.
+ * Should be called if the reference clock changes
+ * to reduce the time required to achieve a lock.
+ */
+ virtual void reset(void) = 0;
};
#endif /* INCLUDED_X300_CLOCK_CTRL_HPP */
diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp
index 5e0635767..a231d7059 100644
--- a/host/lib/usrp/x300/x300_impl.cpp
+++ b/host/lib/usrp/x300/x300_impl.cpp
@@ -579,15 +579,6 @@ void x300_impl::setup_mb(const size_t mb_i, const uhd::device_addr_t &dev_addr)
////////////////////////////////////////////////////////////////////
UHD_MSG(status) << "Setup RF frontend clocking..." << std::endl;
- // Init shadow and clock source; the device comes up with it's internal
- // clock source before locking to something else (if requested).
- mb.clock_control_regs__clock_source = ZPU_SR_CLOCK_CTRL_CLK_SRC_INTERNAL;
- mb.clock_control_regs__pps_select = ZPU_SR_CLOCK_CTRL_PPS_SRC_INTERNAL;
- mb.clock_control_regs__pps_out_enb = 0;
- mb.clock_control_regs__tcxo_enb = 1;
- mb.clock_control_regs__gpsdo_pwr = 1;
- this->update_clock_control(mb);
-
size_t hw_rev = 0;
if(mb_eeprom.has_key("revision") and not mb_eeprom["revision"].empty()) {
try {
@@ -604,6 +595,15 @@ void x300_impl::setup_mb(const size_t mb_i, const uhd::device_addr_t &dev_addr)
hw_rev = X300_REV("D");
}
+ //Initialize clock control with internal references and GPSDO power on.
+ mb.clock_control_regs__clock_source = ZPU_SR_CLOCK_CTRL_CLK_SRC_INTERNAL;
+ mb.clock_control_regs__pps_select = ZPU_SR_CLOCK_CTRL_PPS_SRC_INTERNAL;
+ mb.clock_control_regs__pps_out_enb = 0;
+ mb.clock_control_regs__tcxo_enb = 1;
+ mb.clock_control_regs__gpsdo_pwr = 1;
+ this->update_clock_control(mb);
+
+ //Create clock control
mb.clock = x300_clock_ctrl::make(mb.zpu_spi,
1 /*slaveno*/,
hw_rev,
@@ -782,13 +782,13 @@ void x300_impl::setup_mb(const size_t mb_i, const uhd::device_addr_t &dev_addr)
UHD_MSG(status) << "Initializing time to the GPSDO time" << std::endl;
const time_t tp = time_t(mb.gps->get_sensor("gps_time").to_int()+1);
_tree->access<time_spec_t>(mb_path / "time" / "pps").set(time_spec_t(tp));
+ boost::this_thread::sleep(boost::posix_time::seconds(1)); //wait for time to be set
} else {
_tree->access<std::string>(mb_path / "clock_source" / "value").set("internal");
_tree->access<std::string>(mb_path / "time_source" / "value").set("internal");
UHD_MSG(status) << "References initialized to internal sources" << std::endl;
}
}
-
}
x300_impl::~x300_impl(void)
@@ -1317,7 +1317,11 @@ void x300_impl::update_clock_source(mboard_members_t &mb, const std::string &sou
this->update_clock_control(mb);
- //check for lock - poll every 10 ms for up to 1 second
+ //reset the clock control
+ //without this, the lock time is multiple seconds and the poll below will fail
+ mb.clock->reset();
+
+ //check for lock - poll every 100 ms for up to 1 second
for (int i = 0; i < 10; i++)
{
boost::this_thread::sleep(boost::posix_time::milliseconds(100));