diff options
Diffstat (limited to 'host')
| -rw-r--r-- | host/lib/usrp/cores/rx_dsp_core_200.cpp | 21 | ||||
| -rw-r--r-- | host/lib/usrp/cores/rx_frontend_core_200.cpp | 8 | ||||
| -rw-r--r-- | host/lib/usrp/cores/time64_core_200.cpp | 14 | ||||
| -rw-r--r-- | host/lib/usrp/cores/tx_dsp_core_200.cpp | 14 | ||||
| -rw-r--r-- | host/lib/usrp/cores/tx_frontend_core_200.cpp | 8 |
5 files changed, 33 insertions, 32 deletions
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp index 5c4544392..3215bea15 100644 --- a/host/lib/usrp/cores/rx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp @@ -22,24 +22,25 @@ #include <boost/math/special_functions/round.hpp> #include <boost/math/special_functions/sign.hpp> #include <algorithm> +#include <algorithm> #include <cmath> #define REG_DSP_RX_FREQ _dsp_base + 0 -#define REG_DSP_RX_DECIM _dsp_base + 1 -#define REG_DSP_RX_MUX _dsp_base + 2 +#define REG_DSP_RX_DECIM _dsp_base + 4 +#define REG_DSP_RX_MUX _dsp_base + 8 #define FLAG_DSP_RX_MUX_SWAP_IQ (1 << 0) #define FLAG_DSP_RX_MUX_REAL_MODE (1 << 1) #define REG_RX_CTRL_STREAM_CMD _ctrl_base + 0 -#define REG_RX_CTRL_TIME_SECS _ctrl_base + 1 -#define REG_RX_CTRL_TIME_TICKS _ctrl_base + 2 -#define REG_RX_CTRL_CLEAR _ctrl_base + 3 -#define REG_RX_CTRL_VRT_HDR _ctrl_base + 4 -#define REG_RX_CTRL_VRT_SID _ctrl_base + 5 -#define REG_RX_CTRL_VRT_TLR _ctrl_base + 6 -#define REG_RX_CTRL_NSAMPS_PP _ctrl_base + 7 -#define REG_RX_CTRL_NCHANNELS _ctrl_base + 8 +#define REG_RX_CTRL_TIME_SECS _ctrl_base + 4 +#define REG_RX_CTRL_TIME_TICKS _ctrl_base + 8 +#define REG_RX_CTRL_CLEAR _ctrl_base + 12 +#define REG_RX_CTRL_VRT_HDR _ctrl_base + 16 +#define REG_RX_CTRL_VRT_SID _ctrl_base + 20 +#define REG_RX_CTRL_VRT_TLR _ctrl_base + 24 +#define REG_RX_CTRL_NSAMPS_PP _ctrl_base + 28 +#define REG_RX_CTRL_NCHANNELS _ctrl_base + 32 using namespace uhd; diff --git a/host/lib/usrp/cores/rx_frontend_core_200.cpp b/host/lib/usrp/cores/rx_frontend_core_200.cpp index 646e1890a..0e8220b49 100644 --- a/host/lib/usrp/cores/rx_frontend_core_200.cpp +++ b/host/lib/usrp/cores/rx_frontend_core_200.cpp @@ -19,10 +19,10 @@ #include <boost/math/special_functions/round.hpp> #define REG_RX_FE_SWAP_IQ _base + 0 //lower bit -#define REG_RX_FE_MAG_CORRECTION _base + 1 //18 bits -#define REG_RX_FE_PHASE_CORRECTION _base + 2 //18 bits -#define REG_RX_FE_OFFSET_I _base + 3 //18 bits -#define REG_RX_FE_OFFSET_Q _base + 4 //18 bits +#define REG_RX_FE_MAG_CORRECTION _base + 4 //18 bits +#define REG_RX_FE_PHASE_CORRECTION _base + 8 //18 bits +#define REG_RX_FE_OFFSET_I _base + 12 //18 bits +#define REG_RX_FE_OFFSET_Q _base + 16 //18 bits static boost::uint32_t fs_to_bits(const double num, const size_t bits){ return boost::int32_t(boost::math::round(num * (1 << (bits-1)))); diff --git a/host/lib/usrp/cores/time64_core_200.cpp b/host/lib/usrp/cores/time64_core_200.cpp index ec8c390d0..843d4bdfb 100644 --- a/host/lib/usrp/cores/time64_core_200.cpp +++ b/host/lib/usrp/cores/time64_core_200.cpp @@ -20,11 +20,11 @@ #include <uhd/utils/assert_has.hpp> #define REG_TIME64_SECS _base + 0 -#define REG_TIME64_TICKS _base + 2 -#define REG_TIME64_FLAGS _base + 3 -#define REG_TIME64_IMM _base + 4 -#define REG_TIME64_TPS _base + 5 -#define REG_TIME64_MIMO_SYNC _base + 6 //lower byte is delay cycles +#define REG_TIME64_TICKS _base + 4 +#define REG_TIME64_FLAGS _base + 8 +#define REG_TIME64_IMM _base + 12 +#define REG_TIME64_TPS _base + 16 +#define REG_TIME64_MIMO_SYNC _base + 20 //lower byte is delay cycles //pps flags (see above) #define FLAG_TIME64_PPS_NEGEDGE (0 << 0) @@ -52,7 +52,7 @@ public: { _sources.push_back("none"); _sources.push_back("sma"); - _sources.push_back("sma neg edge"); + _sources.push_back("_sma_"); if (_mimo_delay_cycles != 0) _sources.push_back("mimo"); } @@ -100,7 +100,7 @@ public: if (source == "sma"){ _iface->poke32(REG_TIME64_FLAGS, FLAG_TIME64_PPS_SMA | FLAG_TIME64_PPS_POSEDGE); } - else if (source == "sma neg edge"){ + else if (source == "_sma_"){ _iface->poke32(REG_TIME64_FLAGS, FLAG_TIME64_PPS_SMA | FLAG_TIME64_PPS_NEGEDGE); } diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp index 6ad88c380..293b0b447 100644 --- a/host/lib/usrp/cores/tx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp @@ -25,15 +25,15 @@ #include <cmath> #define REG_DSP_TX_FREQ _dsp_base + 0 -#define REG_DSP_TX_SCALE_IQ _dsp_base + 1 -#define REG_DSP_TX_INTERP _dsp_base + 2 +#define REG_DSP_TX_SCALE_IQ _dsp_base + 4 +#define REG_DSP_TX_INTERP _dsp_base + 8 #define REG_TX_CTRL_NUM_CHAN _ctrl_base + 0 -#define REG_TX_CTRL_CLEAR_STATE _ctrl_base + 1 -#define REG_TX_CTRL_REPORT_SID _ctrl_base + 2 -#define REG_TX_CTRL_POLICY _ctrl_base + 3 -#define REG_TX_CTRL_CYCLES_PER_UP _ctrl_base + 4 -#define REG_TX_CTRL_PACKETS_PER_UP _ctrl_base + 5 +#define REG_TX_CTRL_CLEAR_STATE _ctrl_base + 4 +#define REG_TX_CTRL_REPORT_SID _ctrl_base + 8 +#define REG_TX_CTRL_POLICY _ctrl_base + 12 +#define REG_TX_CTRL_CYCLES_PER_UP _ctrl_base + 16 +#define REG_TX_CTRL_PACKETS_PER_UP _ctrl_base + 20 #define FLAG_TX_CTRL_POLICY_WAIT (0x1 << 0) #define FLAG_TX_CTRL_POLICY_NEXT_PACKET (0x1 << 1) diff --git a/host/lib/usrp/cores/tx_frontend_core_200.cpp b/host/lib/usrp/cores/tx_frontend_core_200.cpp index c568133fd..a7568a81e 100644 --- a/host/lib/usrp/cores/tx_frontend_core_200.cpp +++ b/host/lib/usrp/cores/tx_frontend_core_200.cpp @@ -22,10 +22,10 @@ #include <boost/math/special_functions/round.hpp> #define REG_TX_FE_DC_OFFSET_I _base + 0 //24 bits -#define REG_TX_FE_DC_OFFSET_Q _base + 1 //24 bits -#define REG_TX_FE_MAG_CORRECTION _base + 2 //18 bits -#define REG_TX_FE_PHASE_CORRECTION _base + 3 //18 bits -#define REG_TX_FE_MUX _base + 4 //8 bits (std output = 0x10, reversed = 0x01) +#define REG_TX_FE_DC_OFFSET_Q _base + 4 //24 bits +#define REG_TX_FE_MAG_CORRECTION _base + 8 //18 bits +#define REG_TX_FE_PHASE_CORRECTION _base + 12 //18 bits +#define REG_TX_FE_MUX _base + 16 //8 bits (std output = 0x10, reversed = 0x01) static boost::uint32_t fs_to_bits(const double num, const size_t bits){ return boost::int32_t(boost::math::round(num * (1 << (bits-1)))); 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