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-rw-r--r--host/lib/usrp/common/fx2_ctrl.cpp2
-rw-r--r--host/lib/usrp/cores/i2c_core_100.cpp4
2 files changed, 4 insertions, 2 deletions
diff --git a/host/lib/usrp/common/fx2_ctrl.cpp b/host/lib/usrp/common/fx2_ctrl.cpp
index 8f2206221..650fba784 100644
--- a/host/lib/usrp/common/fx2_ctrl.cpp
+++ b/host/lib/usrp/common/fx2_ctrl.cpp
@@ -243,7 +243,7 @@ public:
const std::streamsize n = file.gcount();
if(n == 0) continue;
int ret = usrp_control_write(VRQ_FPGA_LOAD, 0, FL_XFER, buf, boost::uint16_t(n));
- if (ret < 0 or size_t(ret) != n) {
+ if (ret < 0 or std::streamsize(ret) != n) {
throw uhd::io_error("usrp_load_fpga: fpga load error");
}
}
diff --git a/host/lib/usrp/cores/i2c_core_100.cpp b/host/lib/usrp/cores/i2c_core_100.cpp
index 12352f108..ceeb3f518 100644
--- a/host/lib/usrp/cores/i2c_core_100.cpp
+++ b/host/lib/usrp/cores/i2c_core_100.cpp
@@ -99,7 +99,9 @@ public:
byte_vector_t bytes;
if (num_bytes == 0) return bytes;
- while (_iface->peek16(REG_I2C_CMD_STATUS) & I2C_ST_BUSY);
+ while (_iface->peek16(REG_I2C_CMD_STATUS) & I2C_ST_BUSY){
+ /* NOP */
+ }
_iface->poke16(REG_I2C_DATA, (addr << 1) | 1); //addr and read bit (1)
_iface->poke16(REG_I2C_CMD_STATUS, I2C_CMD_WR | I2C_CMD_START);