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-rw-r--r--host/docs/dboards.rst119
-rw-r--r--host/docs/usrp_e1xx.rst38
-rw-r--r--host/lib/usrp/dboard/db_xcvr2450.cpp13
3 files changed, 144 insertions, 26 deletions
diff --git a/host/docs/dboards.rst b/host/docs/dboards.rst
index 419456df2..373189441 100644
--- a/host/docs/dboards.rst
+++ b/host/docs/dboards.rst
@@ -27,12 +27,14 @@ Though the magic of aliasing, you can down-convert signals
greater than the Nyquist rate of the ADC.
BasicRX Bandwidth (Hz):
- For Real-Mode (A or B subdevice): 250M
- For Complex (AB or BA subdevice): 500M
+
+* For Real-Mode (A or B subdevice): 250M
+* For Complex (AB or BA subdevice): 500M
LFRX Bandwidth (Hz):
- For Real-Mode (A or B subdevice): 33M
- For Complex (AB or BA subdevice): 66M
+
+* For Real-Mode (A or B subdevice): 33M
+* For Complex (AB or BA subdevice): 66M
^^^^^^^^^^^^^^^^^^^^^^^^^^^
Basic TX and and LFTX
@@ -49,31 +51,67 @@ Though the magic of aliasing, you can up-convert signals
greater than the Nyquist rate of the DAC.
BasicTX Bandwidth (Hz): 250M
- For Real-Mode (A or B subdevice): 250M
- For Complex (AB or BA subdevice): 500M
+
+* For Real-Mode (A or B subdevice): 250M
+* For Complex (AB or BA subdevice): 500M
LFTX Bandwidth (Hz): 33M
- For Real-Mode (A or B subdevice): 33M
- For Complex (AB or BA subdevice): 66M
+
+* For Real-Mode (A or B subdevice): 33M
+* For Complex (AB or BA subdevice): 66M
^^^^^^^^^^^^^^^^^^^^^^^^^^^
DBSRX
^^^^^^^^^^^^^^^^^^^^^^^^^^^
-The DBSRX board has 1 quadrature subdevice.
+The DBSRX board has 1 quadrature subdevice.
+It defaults to direct conversion, but can use a low IF through lo_offset in uhd::tune_request_t
Receive Antennas: **J3**
The board has no user selectable antenna setting
-Receive Gains:
- **GC1**, Range: 0-56dB
- **GC2**, Range: 0-24dB
+Receive Gains:
+
+* **GC1**, Range: 0-56dB
+* **GC2**, Range: 0-24dB
Bandwidth (Hz): 8M-66M
+Sensors:
+
+* **lo_locked**: boolean for LO lock state
+
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+DBSRX2
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+The DBSRX2 board has 1 quadrature subdevice.
+It defaults to direct conversion, but can use a low IF through lo_offset in uhd::tune_request_t
+
+Receive Antennas: **J3**
+
+The board has no user selectable antenna setting
+
+Receive Gains:
+
+* **GC1**, Range: 0-73dB
+* **BBG**, Range: 0-15dB
+
+Bandwidth (Hz): 8M-80M
+
+Sensors:
+
+* **lo_locked**: boolean for LO lock state
+
^^^^^^^^^^^^^^^^^^^^^^^^^^^
RFX Series
^^^^^^^^^^^^^^^^^^^^^^^^^^^
+The RFX Series boards have 2 quadrature subdevices, one transmit, one receive.
+Transmit defaults to low IF and Receive defaults to direct conversion.
+The IF can be adjusted through lo_offset in uhd::tune_request_t
+
+The RFX Series boards have independent receive and transmit LO's and synthesizers
+allowing full-duplex operation on different transmit and receive frequencies.
+
Transmit Antennas: **TX/RX**
Receive Antennas: **TX/RX** or **RX2**
@@ -85,12 +123,21 @@ the receive antenna will always be set to RX2, regardless of the settings.
Receive Gains: **PGA0**, Range: 0-70dB (except RFX400 range is 0-45dB)
Bandwidths (Hz):
- * **RX**: 40M
- * **TX**: 40M
+
+* **RX**: 40M
+* **TX**: 40M
+
+Sensors:
+
+* **lo_locked**: boolean for LO lock state
^^^^^^^^^^^^^^^^^^^^^^^^^^^
XCVR 2450
^^^^^^^^^^^^^^^^^^^^^^^^^^^
+The XCVR2450 has 2 quadrature subdevices, one transmit, one receive.
+Transmit and Receive default to direct conversion but
+can be used in low IF mode through lo_offset in uhd::tune_request_t
+
The XCVR2450 has a non-contiguous tuning range consisting of a
high band (4.9-6.0GHz) and a low band (2.4-2.5GHz).
@@ -106,20 +153,35 @@ The XCVR2450 does not support full-duplex mode, attempting to operate
in full-duplex will result in transmit-only operation.
Transmit Gains:
- * **VGA**, Range: 0-30dB
- * **BB**, Range: 0-5dB
+
+* **VGA**, Range: 0-30dB
+* **BB**, Range: 0-5dB
Receive Gains:
- * **LNA**, Range: 0-30.5dB
- * **VGA**, Range: 0-62dB
+
+* **LNA**, Range: 0-30.5dB
+* **VGA**, Range: 0-62dB
Bandwidths (Hz):
- * **RX**: 15M, 19M, 28M, 36M; (each +-0, 5, or 10%)
- * **TX**: 24M, 36M, 48M
+
+* **RX**: 15M, 19M, 28M, 36M; (each +-0, 5, or 10%)
+* **TX**: 24M, 36M, 48M
+
+Sensors:
+
+* **lo_locked**: boolean for LO lock state
+* **rssi**: float for rssi in dBm
^^^^^^^^^^^^^^^^^^^^^^^^^^^
WBX Series
^^^^^^^^^^^^^^^^^^^^^^^^^^^
+The WBX Series boards have 2 quadrature subdevices, one transmit, one receive.
+Transmit and Receive default to direct conversion but
+can be used in low IF mode through lo_offset in uhd::tune_request_t
+
+The WBX Series boards have independent receive and transmit LO's and synthesizers
+allowing full-duplex operation on different transmit and receive frequencies.
+
Transmit Antennas: **TX/RX**
Receive Antennas: **TX/RX** or **RX2**
@@ -133,17 +195,26 @@ Transmit Gains: **PGA0**, Range: 0-25dB
Receive Gains: **PGA0**, Range: 0-31.5dB
Bandwidths (Hz):
- * **RX**: 40M
- * **TX**: 40M
+
+* **RX**: 40M
+* **TX**: 40M
+
+Sensors:
+
+* **lo_locked**: boolean for LO lock state
^^^^^^^^^^^^^^^^^^^^^^^^^^^
TVRX
^^^^^^^^^^^^^^^^^^^^^^^^^^^
+The TVRX board has 1 real-mode subdevice.
+It is operated at a low IF.
+
Receive Antennas: RX
Receive Gains:
- * **RF**, Range: -13.3-50.3dB (frequency-dependent)
- * **IF**, Range: -1.5-32.5dB
+
+* **RF**, Range: -13.3-50.3dB (frequency-dependent)
+* **IF**, Range: -1.5-32.5dB
Bandwidth: 6MHz
diff --git a/host/docs/usrp_e1xx.rst b/host/docs/usrp_e1xx.rst
index fb5848bad..2818a0a65 100644
--- a/host/docs/usrp_e1xx.rst
+++ b/host/docs/usrp_e1xx.rst
@@ -63,3 +63,41 @@ Run the following commands to restore the clock generator to a usable state:
cd <install-path>/share/uhd/usrp_e_utilities
./usrp-e-utility --fpga=../images/usrp_e100_pt_fpga.bin --reclk
+
+
+------------------------------------------------------------------------
+Clock Synchronization
+------------------------------------------------------------------------
+
+
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+Ref Clock - 10MHz
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+The E1xx has a 10MHz TCXO which can be used to discipline the flexible clocking by
+selecting REF_INT for the clock_config_t.
+
+Alternately, an external 10MHz reference clock can be supplied by soldering a connector.
+
+* Connector J10 (REF_IN) needs MCX connector WM5541-ND or similar
+* Square wave will offer the best phase noise performance, but sinusoid is acceptable
+* Power level: 0 to 15dBm
+* Select REF_SMA in clock_config_t
+
+
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+PPS - Pulse Per Second
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+An exteral PPS signal for timestamp synchronization can be supplied by soldering a connector.
+
+* Connector J13 (PPS) needs MCX connector WM5541-ND or similar
+* Requires a square wave signal
+* Amplitude: 3.3 to 5Vpp
+
+Test the PPS input with the following app:
+
+* <args> are device address arguments (optional if only one USRP is on your machine)
+
+::
+
+ cd <install-path>/share/uhd/examples
+ ./test_pps_input --args=<args>
diff --git a/host/lib/usrp/dboard/db_xcvr2450.cpp b/host/lib/usrp/dboard/db_xcvr2450.cpp
index 9d25b30a5..70b0bbabd 100644
--- a/host/lib/usrp/dboard/db_xcvr2450.cpp
+++ b/host/lib/usrp/dboard/db_xcvr2450.cpp
@@ -152,12 +152,21 @@ private:
* \return the rssi in dB
*/
double get_rssi(void){
+ //*FIXME* RSSI depends on LNA Gain Setting (datasheet pg 16 top middle chart)
+ double max_power;
+ switch(_max2829_regs.rx_lna_gain){
+ case 0:
+ case 1: max_power = 0; break;
+ case 2: max_power = -15; break;
+ case 3: max_power = -30.5; break;
+ }
+
//constants for the rssi calculation
static const double min_v = 0.5, max_v = 2.5;
static const double rssi_dyn_range = 60;
//calculate the rssi from the voltage
double voltage = this->get_iface()->read_aux_adc(dboard_iface::UNIT_RX, dboard_iface::AUX_ADC_B);
- return rssi_dyn_range*(voltage - min_v)/(max_v - min_v);
+ return max_power - rssi_dyn_range*(voltage - min_v)/(max_v - min_v);
}
};
@@ -621,7 +630,7 @@ void xcvr2450::rx_get(const wax::obj &key_, wax::obj &val){
if (key.name == "lo_locked")
val = sensor_value_t("LO", this->get_locked(), "locked", "unlocked");
else if (key.name == "rssi")
- val = sensor_value_t("RSSI", this->get_rssi(), "dB");
+ val = sensor_value_t("RSSI", this->get_rssi(), "dBm");
else
UHD_THROW_INVALID_CODE_PATH();
return;
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-17 13:52:29 +0000