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-rw-r--r--host/include/uhd/transport/zero_copy.hpp8
-rw-r--r--host/include/uhd/usrp/mboard_props.hpp2
-rw-r--r--host/lib/transport/vrt_packet_handler.hpp18
-rw-r--r--host/lib/usrp/usrp2/fw_common.h2
-rw-r--r--host/lib/usrp/usrp2/mboard_impl.cpp10
-rw-r--r--host/lib/usrp/usrp2/usrp2_regs.hpp10
6 files changed, 31 insertions, 19 deletions
diff --git a/host/include/uhd/transport/zero_copy.hpp b/host/include/uhd/transport/zero_copy.hpp
index 2815e3189..da10bfbe2 100644
--- a/host/include/uhd/transport/zero_copy.hpp
+++ b/host/include/uhd/transport/zero_copy.hpp
@@ -47,7 +47,7 @@ namespace uhd{ namespace transport{
* Get the size of the underlying buffer.
* \return the number of bytes
*/
- size_t size(void) const{
+ inline size_t size(void) const{
return boost::asio::buffer_size(this->get());
}
@@ -55,7 +55,7 @@ namespace uhd{ namespace transport{
* Get a pointer to the underlying buffer.
* \return a pointer into memory
*/
- template <class T> T cast(void) const{
+ template <class T> inline T cast(void) const{
return boost::asio::buffer_cast<T>(this->get());
}
@@ -89,7 +89,7 @@ namespace uhd{ namespace transport{
* Get the size of the underlying buffer.
* \return the number of bytes
*/
- size_t size(void) const{
+ inline size_t size(void) const{
return boost::asio::buffer_size(this->get());
}
@@ -97,7 +97,7 @@ namespace uhd{ namespace transport{
* Get a pointer to the underlying buffer.
* \return a pointer into memory
*/
- template <class T> T cast(void) const{
+ template <class T> inline T cast(void) const{
return boost::asio::buffer_cast<T>(this->get());
}
diff --git a/host/include/uhd/usrp/mboard_props.hpp b/host/include/uhd/usrp/mboard_props.hpp
index 7ff454472..a432ce50c 100644
--- a/host/include/uhd/usrp/mboard_props.hpp
+++ b/host/include/uhd/usrp/mboard_props.hpp
@@ -40,7 +40,7 @@ namespace uhd{ namespace usrp{
MBOARD_PROP_TX_DBOARD = 'v', //ro, wax::obj
MBOARD_PROP_TX_DBOARD_NAMES = 'V', //ro, prop_names_t
MBOARD_PROP_CLOCK_CONFIG = 'C', //rw, clock_config_t
- MBOARD_PROP_TIME_NOW = 't', //wo, time_spec_t
+ MBOARD_PROP_TIME_NOW = 't', //rw, time_spec_t
MBOARD_PROP_TIME_NEXT_PPS = 'T', //wo, time_spec_t
MBOARD_PROP_STREAM_CMD = 's' //wo, stream_cmd_t
};
diff --git a/host/lib/transport/vrt_packet_handler.hpp b/host/lib/transport/vrt_packet_handler.hpp
index 42cbb7e5a..177239509 100644
--- a/host/lib/transport/vrt_packet_handler.hpp
+++ b/host/lib/transport/vrt_packet_handler.hpp
@@ -151,20 +151,15 @@ namespace vrt_packet_handler{
//extract the number of samples available to copy
size_t bytes_per_item = otw_type.get_sample_size();
size_t bytes_available = state.size_of_copy_buffs;
- size_t num_samps = std::min(total_samps, bytes_available/bytes_per_item);
- size_t bytes_to_copy = num_samps*bytes_per_item;
-
- //setup the fragment flags and offset
- metadata.more_fragments = total_samps < num_samps;
- metadata.fragment_offset = state.fragment_offset_in_samps;
- state.fragment_offset_in_samps += num_samps; //set for next call
+ size_t nsamps_to_copy = std::min(total_samps, bytes_available/bytes_per_item);
+ size_t bytes_to_copy = nsamps_to_copy*bytes_per_item;
for (size_t i = 0; i < state.width; i++){
//copy-convert the samples from the recv buffer
uhd::transport::convert_otw_type_to_io_type(
state.copy_buffs[i], otw_type,
reinterpret_cast<boost::uint8_t *>(buffs[i]) + offset_bytes,
- io_type, num_samps
+ io_type, nsamps_to_copy
);
//update the rx copy buffer to reflect the bytes copied
@@ -173,7 +168,12 @@ namespace vrt_packet_handler{
//update the copy buffer's availability
state.size_of_copy_buffs -= bytes_to_copy;
- return num_samps;
+ //setup the fragment flags and offset
+ metadata.more_fragments = state.size_of_copy_buffs != 0;
+ metadata.fragment_offset = state.fragment_offset_in_samps;
+ state.fragment_offset_in_samps += nsamps_to_copy; //set for next call
+
+ return nsamps_to_copy;
}
/*******************************************************************
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h
index 242d268ec..12daa6286 100644
--- a/host/lib/usrp/usrp2/fw_common.h
+++ b/host/lib/usrp/usrp2/fw_common.h
@@ -38,7 +38,7 @@ extern "C" {
//defines the protocol version in this shared header
//increment this value when the protocol is changed
-#define USRP2_PROTO_VERSION 4
+#define USRP2_PROTO_VERSION 5
//used to differentiate control packets over data port
#define USRP2_INVALID_VRT_HEADER 0
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index 28a346be7..36ac6275f 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -25,6 +25,7 @@
#include <boost/bind.hpp>
#include <boost/asio/ip/address_v4.hpp>
#include <boost/assign/list_of.hpp>
+#include <iostream>
using namespace uhd;
using namespace uhd::usrp;
@@ -72,6 +73,7 @@ usrp2_mboard_impl::usrp2_mboard_impl(
);
_iface->poke32(U2_REG_RX_CTRL_VRT_STREAM_ID, 0);
_iface->poke32(U2_REG_RX_CTRL_VRT_TRAILER, 0);
+ _iface->poke32(U2_REG_TIME64_TPS, size_t(get_master_clock_freq()));
//init the ddc
init_ddc_config();
@@ -254,6 +256,14 @@ void usrp2_mboard_impl::get(const wax::obj &key_, wax::obj &val){
val = _clock_config;
return;
+ case MBOARD_PROP_TIME_NOW:
+ val = time_spec_t(
+ _iface->peek32(U2_REG_TIME64_SECS_RB),
+ _iface->peek32(U2_REG_TIME64_TICKS_RB),
+ get_master_clock_freq()
+ );
+ return;
+
default: UHD_THROW_PROP_GET_ERROR();
}
}
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index 589fa71a3..c859d3603 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -18,8 +18,6 @@
#ifndef INCLUDED_USRP2_REGS_HPP
#define INCLUDED_USRP2_REGS_HPP
-#include <boost/cstdint.hpp>
-
////////////////////////////////////////////////////
// Settings Bus, Slave #7, Not Byte Addressable!
//
@@ -46,7 +44,7 @@
#define SR_SIMTIMER 198
#define SR_LAST 255
-#define _SR_ADDR(sr) (MISC_OUTPUT_BASE + (sr) * sizeof(boost::uint32_t))
+#define _SR_ADDR(sr) ((MISC_OUTPUT_BASE) + (4*(sr)))
/////////////////////////////////////////////////
// SPI Slave Constants
@@ -104,7 +102,11 @@
#define U2_REG_TIME64_SECS _SR_ADDR(SR_TIME64 + 0) // value to set absolute secs to on next PPS
#define U2_REG_TIME64_TICKS _SR_ADDR(SR_TIME64 + 1) // value to set absolute ticks to on next PPS
#define U2_REG_TIME64_FLAGS _SR_ADDR(SR_TIME64 + 2) // flags - see chart above
-#define U2_REG_TIME64_IMM _SR_ADDR(SR_TIME64 + 3) // set immediate (0=latch on next pps, 1=latch immediate, default=0)
+#define U2_REG_TIME64_IMM _SR_ADDR(SR_TIME64 + 3) // set immediate (0=latch on next pps, 1=latch immediate, default=0)
+#define U2_REG_TIME64_TPS _SR_ADDR(SR_TIME64 + 4) // the ticks per second rollover count
+
+#define U2_REG_TIME64_SECS_RB (0xCC00 + 4*10)
+#define U2_REG_TIME64_TICKS_RB (0xCC00 + 4*11)
//pps flags (see above)
#define U2_FLAG_TIME64_PPS_NEGEDGE (0 << 0)
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-16 22:19:52 +0000